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[pkgsrc/trunk]: pkgsrc/emulators/qemu Fix several issues in qemu-system-alpha...
details: https://anonhg.NetBSD.org/pkgsrc/rev/8d4ed98943f2
branches: trunk
changeset: 440243:8d4ed98943f2
user: thorpej <thorpej%pkgsrc.org@localhost>
date: Sun Oct 04 20:39:25 2020 +0000
description:
Fix several issues in qemu-system-alpha's system emulation and
PALcode. qemu-system-alpha is now capable of running NetBSD/alpha.
Bump package revision to 6.
diffstat:
emulators/qemu/Makefile | 11 +-
emulators/qemu/distinfo | 21 +-
emulators/qemu/patches/patch-hw_alpha_alpha_sys.h | 15 +
emulators/qemu/patches/patch-hw_alpha_dp264.c | 39 +
emulators/qemu/patches/patch-hw_alpha_typhoon.c | 148 ++++++
emulators/qemu/patches/patch-hw_rtc_mc146818rtc.c | 32 +
emulators/qemu/patches/patch-roms_qemu-palcode_hwrpb.h | 72 +++
emulators/qemu/patches/patch-roms_qemu-palcode_init.c | 234 +++++++++++
emulators/qemu/patches/patch-roms_qemu-palcode_memcpy.c | 15 +
emulators/qemu/patches/patch-roms_qemu-palcode_memset.c | 15 +
emulators/qemu/patches/patch-roms_qemu-palcode_pal.S | 53 ++
emulators/qemu/patches/patch-roms_qemu-palcode_pci.c | 78 +++
emulators/qemu/patches/patch-roms_qemu-palcode_pci.h | 18 +
emulators/qemu/patches/patch-roms_qemu-palcode_printf.c | 31 +
emulators/qemu/patches/patch-roms_qemu-palcode_protos.h | 66 +++
emulators/qemu/patches/patch-roms_qemu-palcode_sys-clipper.h | 38 +
emulators/qemu/patches/patch-roms_qemu-palcode_vgaio.c | 16 +
17 files changed, 899 insertions(+), 3 deletions(-)
diffs (truncated from 1011 to 300 lines):
diff -r 0be8c34c700b -r 8d4ed98943f2 emulators/qemu/Makefile
--- a/emulators/qemu/Makefile Sun Oct 04 18:36:54 2020 +0000
+++ b/emulators/qemu/Makefile Sun Oct 04 20:39:25 2020 +0000
@@ -1,7 +1,7 @@
-# $NetBSD: Makefile,v 1.252 2020/09/27 21:29:57 jakllsch Exp $
+# $NetBSD: Makefile,v 1.253 2020/10/04 20:39:25 thorpej Exp $
DISTNAME= qemu-5.1.0
-PKGREVISION= 5
+PKGREVISION= 6
CATEGORIES= emulators
MASTER_SITES= https://download.qemu.org/
EXTRACT_SUFX= .tar.xz
@@ -34,6 +34,10 @@
.include "../../mk/bsd.prefs.mk"
+DISTFILES= ${DEFAULT_DISTFILES}
+DISTFILES+= palcode-clipper
+SITES.palcode-clipper= http://ftp.netbsd.org/pub/NetBSD/arch/alpha/qemu/
+
CONFIGURE_ARGS+= --prefix=${PREFIX}
CONFIGURE_ARGS+= --interp-prefix=${PREFIX}/share/qemu
CONFIGURE_ARGS+= --sysconfdir=${PKG_SYSCONFDIR}
@@ -138,6 +142,9 @@
TEST_TARGET= check
+post-extract:
+ cp ${WRKDIR}/palcode-clipper ${WRKSRC}/pc-bios/palcode-clipper
+
# Some dependencies aren't correct and this tries to be re-made on install,
# failing due to configure bugs.
post-build:
diff -r 0be8c34c700b -r 8d4ed98943f2 emulators/qemu/distinfo
--- a/emulators/qemu/distinfo Sun Oct 04 18:36:54 2020 +0000
+++ b/emulators/qemu/distinfo Sun Oct 04 20:39:25 2020 +0000
@@ -1,5 +1,9 @@
-$NetBSD: distinfo,v 1.163 2020/09/27 21:29:57 jakllsch Exp $
+$NetBSD: distinfo,v 1.164 2020/10/04 20:39:25 thorpej Exp $
+SHA1 (palcode-clipper) = e25ae10a10e0801e47b62b9ee2d10c8ccb4ee940
+RMD160 (palcode-clipper) = a637f1cc38dabfdff36e3f02b6dd02d7c63cb8db
+SHA512 (palcode-clipper) = 8d6966e59b59bc17c563bae3648af4ac99108990294edd0398ee91d8e61ec8f890608b9326b175d6a3a5668106b67b019a2c51b79f5b2935d4a516d34490056c
+Size (palcode-clipper) = 156704 bytes
SHA1 (qemu-5.1.0.tar.xz) = 8c70ce2b65349e9b42bd20c9dec2c90f8e7b960a
RMD160 (qemu-5.1.0.tar.xz) = f5e4a20c481d7e2bf822bf6bf41667b810c3cecd
SHA512 (qemu-5.1.0.tar.xz) = e213edb71d93d5167ddce7546220ecb7b52a7778586a4f476f65bd1e510c9cfc6d1876238a7b501d9cc3fd31cc2ae4b7fb9e753bc3f12cc17cd16dfce2a96ba3
@@ -12,10 +16,14 @@
SHA1 (patch-configure) = 2f5689b83b58066865598a83d53be2de6b42e303
SHA1 (patch-contrib_ivshmem-client_ivshmem-client.c) = 40c8751607cbf66a37e4c4e08f2664b864e2e984
SHA1 (patch-contrib_ivshmem-server_ivshmem-server.c) = d8f53432b5752f4263dc4ef96108a976a05147a3
+SHA1 (patch-hw_alpha_alpha_sys.h) = 5908698208937ff9eb0bf1c504e1144af3d1bcc4
+SHA1 (patch-hw_alpha_dp264.c) = 856304784f098863728ecac3d0a9287aa22190d7
+SHA1 (patch-hw_alpha_typhoon.c) = 1bed5cd6f355c4163585c5331356ebf38c5c3a16
SHA1 (patch-hw_core_uboot__image.h) = 17eef02349343c5fcfb7a4069cb6f8fd11efcb59
SHA1 (patch-hw_display_omap__dss.c) = 6b13242f28e32346bc70548c216c578d98fd3420
SHA1 (patch-hw_net_etraxfs__eth.c) = e5dd1661d60dbcd27b332403e0843500ba9544bc
SHA1 (patch-hw_net_xilinx__axienet.c) = ebcd2676d64ce6f31e4a8c976d4fdf530ad5e8b7
+SHA1 (patch-hw_rtc_mc146818rtc.c) = cc7a3b28010966b65b7a16db756226ac2669f310
SHA1 (patch-hw_scsi_scsi-disk.c) = fdbf2f962a6dcb1a115a7f8a5b8790ff9295fb33
SHA1 (patch-hw_usb_dev-mtp.c) = 0f9034fb3904e5d5e3b98d24b94e054181687d95
SHA1 (patch-include_sysemu_hw__accel.h) = 852bc031a1e065f614c5c913351f3e13183e00b7
@@ -23,6 +31,17 @@
SHA1 (patch-include_sysemu_nvmm.h) = 3bd3da9b42ace0f806fabeb580f90ae19c273869
SHA1 (patch-net_tap-solaris.c) = cc953c9a624dd55ace4e130d0b31bbfb956c17d5
SHA1 (patch-qemu-options.hx) = e2f264117f703aa4ccf56219f370c3b1303e8b07
+SHA1 (patch-roms_qemu-palcode_hwrpb.h) = ae7b4c0680367af6f740d62a54dc86352128d76f
+SHA1 (patch-roms_qemu-palcode_init.c) = 7a0ebcd86f4106318791e7d90273fb55a424f1b8
+SHA1 (patch-roms_qemu-palcode_memcpy.c) = 7761774ae9092d0f494deaf302d663ba479a09cf
+SHA1 (patch-roms_qemu-palcode_memset.c) = 55fa4e52e03a351eb98475e7c4755e5edc409e6c
+SHA1 (patch-roms_qemu-palcode_pal.S) = 4f41194ffaeaddb39fa7bff953bd75c2f070dfa5
+SHA1 (patch-roms_qemu-palcode_pci.c) = 1d5b240fd6c940cbbe8518e4db529adba23d6fec
+SHA1 (patch-roms_qemu-palcode_pci.h) = 081c9d6d9955be24fd19455ae653339cdb133f02
+SHA1 (patch-roms_qemu-palcode_printf.c) = 7fb158f85bd1be9a939850d9d86175013f7a142b
+SHA1 (patch-roms_qemu-palcode_protos.h) = 60cf9db5544cb842207a893a78fa6bbe45af4c71
+SHA1 (patch-roms_qemu-palcode_sys-clipper.h) = 8983d7072b1c1e66bf0a18d2e49e503745692a46
+SHA1 (patch-roms_qemu-palcode_vgaio.c) = c8d7adc053cd6655f005527d16647611040c09d2
SHA1 (patch-roms_u-boot-sam460ex_Makefile) = e43111db0c56625bc8df5e3688c242c341f3fa6a
SHA1 (patch-roms_u-boot_tools_imx8m__image.sh) = e4c452062f40569e33aa93eec4a65bd3af2e74fc
SHA1 (patch-softmmu_cpus.c) = 489b6ef1a37bb617d50b903dfdd6fb41a302508d
diff -r 0be8c34c700b -r 8d4ed98943f2 emulators/qemu/patches/patch-hw_alpha_alpha_sys.h
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/emulators/qemu/patches/patch-hw_alpha_alpha_sys.h Sun Oct 04 20:39:25 2020 +0000
@@ -0,0 +1,15 @@
+$NetBSD: patch-hw_alpha_alpha_sys.h,v 1.1 2020/10/04 20:39:25 thorpej Exp $
+
+Pass 'devfn_min' argument to typhoon_init().
+
+--- hw/alpha/alpha_sys.h.orig 2020-10-01 00:17:37.231192966 +0000
++++ hw/alpha/alpha_sys.h 2020-10-01 00:17:49.188425709 +0000
+@@ -11,7 +11,7 @@
+
+
+ PCIBus *typhoon_init(MemoryRegion *, ISABus **, qemu_irq *, AlphaCPU *[4],
+- pci_map_irq_fn);
++ pci_map_irq_fn, uint8_t devfn_min);
+
+ /* alpha_pci.c. */
+ extern const MemoryRegionOps alpha_pci_ignore_ops;
diff -r 0be8c34c700b -r 8d4ed98943f2 emulators/qemu/patches/patch-hw_alpha_dp264.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/emulators/qemu/patches/patch-hw_alpha_dp264.c Sun Oct 04 20:39:25 2020 +0000
@@ -0,0 +1,39 @@
+$NetBSD: patch-hw_alpha_dp264.c,v 1.1 2020/10/04 20:39:25 thorpej Exp $
+
+Because we're using CLIPPER IRQ mappings, the minimum PCI device
+IdSel is 1. Pass that to typhoon_init().
+
+Set bit 6 in trap_arg2 to tell the PALcode that the -nographic option
+was specified. This is used by the PALcode to initialize the CTB for
+serial console.
+
+--- hw/alpha/dp264.c.orig 2020-08-11 19:17:14.000000000 +0000
++++ hw/alpha/dp264.c 2020-10-02 15:52:10.654767858 +0000
+@@ -72,13 +72,25 @@ static void clipper_init(MachineState *m
+ cpus[i] = ALPHA_CPU(cpu_create(machine->cpu_type));
+ }
+
++ /* arg0 -> memory size
++ arg1 -> kernel entry point
++ arg2 -> config word
++
++ Config word: bits 0-5 -> ncpus
++ bit 6 -> nographics option (for HWRPB CTB)
++
++ See init_hwrpb() in the PALcode. */
++
+ cpus[0]->env.trap_arg0 = ram_size;
+ cpus[0]->env.trap_arg1 = 0;
+ cpus[0]->env.trap_arg2 = smp_cpus;
++ if (!machine->enable_graphics)
++ cpus[0]->env.trap_arg2 |= (1 << 6);
+
+- /* Init the chipset. */
++ /* Init the chipset. Because we're using CLIPPER IRQ mappings,
++ the minimum PCI device IdSel is 1. */
+ pci_bus = typhoon_init(machine->ram, &isa_bus, &rtc_irq, cpus,
+- clipper_pci_map_irq);
++ clipper_pci_map_irq, PCI_DEVFN(1, 0));
+
+ /* Since we have an SRM-compatible PALcode, use the SRM epoch. */
+ mc146818_rtc_init(isa_bus, 1900, rtc_irq);
diff -r 0be8c34c700b -r 8d4ed98943f2 emulators/qemu/patches/patch-hw_alpha_typhoon.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/emulators/qemu/patches/patch-hw_alpha_typhoon.c Sun Oct 04 20:39:25 2020 +0000
@@ -0,0 +1,148 @@
+$NetBSD: patch-hw_alpha_typhoon.c,v 1.1 2020/10/04 20:39:25 thorpej Exp $
+
+Allow callers of typhoon_init() to specify a minimum PCI devfn.
+
+Add a minimal i82378 SIO PCI node so that NetBSD/alpha will find
+and probe the ISA bus.
+
+--- hw/alpha/typhoon.c.orig 2020-10-01 00:34:35.392982214 +0000
++++ hw/alpha/typhoon.c 2020-10-01 00:53:13.419539599 +0000
+@@ -817,7 +817,8 @@ static void typhoon_alarm_timer(void *op
+ }
+
+ PCIBus *typhoon_init(MemoryRegion *ram, ISABus **isa_bus, qemu_irq *p_rtc_irq,
+- AlphaCPU *cpus[4], pci_map_irq_fn sys_map_irq)
++ AlphaCPU *cpus[4], pci_map_irq_fn sys_map_irq,
++ uint8_t devfn_min)
+ {
+ MemoryRegion *addr_space = get_system_memory();
+ DeviceState *dev;
+@@ -887,7 +888,7 @@ PCIBus *typhoon_init(MemoryRegion *ram,
+ b = pci_register_root_bus(dev, "pci",
+ typhoon_set_irq, sys_map_irq, s,
+ &s->pchip.reg_mem, &s->pchip.reg_io,
+- 0, 64, TYPE_PCI_BUS);
++ devfn_min, 64, TYPE_PCI_BUS);
+ phb->bus = b;
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
+
+@@ -921,10 +922,21 @@ PCIBus *typhoon_init(MemoryRegion *ram,
+ /* Pchip1 PCI configuration, 0x802.FE00.0000, 16MB. */
+
+ /* Init the ISA bus. */
+- /* ??? Technically there should be a cy82c693ub pci-isa bridge. */
++ /* Init the PCI-ISA bridge. Technically, this would have been
++ a cy82c693ub, but a i82378 SIO was also used on many Alpha
++ systems and is close enough.
++
++ ??? We are using a private, stripped down implementation of i82378
++ so that we can handle the way the ISA interrupts are wired up on
++ Tsunami-type systems. We're leaving that (and the rest of the board
++ peripheral setup) untoucned; we merely need to instantiate the PCI
++ device node for the bridge, so that operating systems that expect
++ it to be there will see it. */
+ {
+ qemu_irq *isa_irqs;
+
++ pci_create_simple(b, PCI_DEVFN(7, 0), "i82378-typhoon");
++
+ *isa_bus = isa_bus_new(NULL, get_system_memory(), &s->pchip.reg_io,
+ &error_abort);
+ isa_irqs = i8259_init(*isa_bus,
+@@ -955,10 +967,96 @@ static const TypeInfo typhoon_iommu_memo
+ .class_init = typhoon_iommu_memory_region_class_init,
+ };
+
++/* The following was copied from hw/isa/i82378.c and modified to provide
++ only the minimal PCI device node. */
++
++/*
++ * QEMU Intel i82378 emulation (PCI to ISA bridge)
++ *
++ * Copyright (c) 2010-2011 Herv\xc3\xa9 Poussineau
++ *
++ * This library is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU Lesser General Public
++ * License as published by the Free Software Foundation; either
++ * version 2 of the License, or (at your option) any later version.
++ *
++ * This library is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ * Lesser General Public License for more details.
++ *
++ * You should have received a copy of the GNU Lesser General Public
++ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
++ */
++
++#include "migration/vmstate.h"
++
++#define TYPE_I82378 "i82378-typhoon"
++#define I82378(obj) \
++ OBJECT_CHECK(I82378State, (obj), TYPE_I82378)
++
++typedef struct I82378State {
++ PCIDevice parent_obj;
++} I82378State;
++
++static const VMStateDescription vmstate_i82378 = {
++ .name = "pci-i82378-typhoon",
++ .version_id = 0,
++ .minimum_version_id = 0,
++ .fields = (VMStateField[]) {
++ VMSTATE_PCI_DEVICE(parent_obj, I82378State),
++ VMSTATE_END_OF_LIST()
++ },
++};
++
++static void i82378_realize(PCIDevice *pci, Error **errp)
++{
++ uint8_t *pci_conf;
++
++ pci_conf = pci->config;
++ pci_set_word(pci_conf + PCI_COMMAND,
++ PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
++ pci_set_word(pci_conf + PCI_STATUS,
++ PCI_STATUS_DEVSEL_MEDIUM);
++
++ pci_config_set_interrupt_pin(pci_conf, 1); /* interrupt pin 0 */
++}
++
++static void i82378_init(Object *obj)
++{
++}
++
++static void i82378_class_init(ObjectClass *klass, void *data)
++{
++ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
++ DeviceClass *dc = DEVICE_CLASS(klass);
++
++ k->realize = i82378_realize;
++ k->vendor_id = PCI_VENDOR_ID_INTEL;
++ k->device_id = PCI_DEVICE_ID_INTEL_82378;
++ k->revision = 0x03;
++ k->class_id = PCI_CLASS_BRIDGE_ISA;
++ dc->vmsd = &vmstate_i82378;
++ set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
++}
++
++static const TypeInfo i82378_typhoon_type_info = {
++ .name = TYPE_I82378,
++ .parent = TYPE_PCI_DEVICE,
++ .instance_size = sizeof(I82378State),
++ .instance_init = i82378_init,
++ .class_init = i82378_class_init,
++ .interfaces = (InterfaceInfo[]) {
++ { INTERFACE_CONVENTIONAL_PCI_DEVICE },
++ { },
++ },
++};
++
+ static void typhoon_register_types(void)
+ {
+ type_register_static(&typhoon_pcihost_info);
+ type_register_static(&typhoon_iommu_memory_region_info);
++ type_register_static(&i82378_typhoon_type_info);
+ }
+
+ type_init(typhoon_register_types)
diff -r 0be8c34c700b -r 8d4ed98943f2 emulators/qemu/patches/patch-hw_rtc_mc146818rtc.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/emulators/qemu/patches/patch-hw_rtc_mc146818rtc.c Sun Oct 04 20:39:25 2020 +0000
@@ -0,0 +1,32 @@
+$NetBSD: patch-hw_rtc_mc146818rtc.c,v 1.1 2020/10/04 20:39:25 thorpej Exp $
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