[pkgsrc/trunk]: pkgsrc/cad/verilog-current update to verilog-current-20070227

[dmcmahill <dmcmahill%pkgsrc.org@localhost>]

details:   https://anonhg.NetBSD.org/pkgsrc/rev/f7a56ab407f3
branches:  trunk
changeset: 526093:f7a56ab407f3
user:      dmcmahill <dmcmahill%pkgsrc.org@localhost>
date:      Thu Mar 01 01:03:45 2007 +0000

description:
update to verilog-current-20070227

Release Notes for Icarus Verilog Snapshot 20070227

* Fix some problems with specify block parsing. Detect some cases that
  are parsed but not properly implemented yet and issue warnings or
  errors. Also fixed a few problems with inertial delay model timing.

* Detect is some cases Verilog source errors that can be better
  reported to users. This includes more specific error messages for
  certain syntax errors.

* Fix problems with overridden continuous assignments.

* Hide bool types from logic type as far as VPI is concerned, for the
  sake of compatibility.

* Fix a variety of code generator expression lifetime bugs that caused
  obscure (and wrong) output results in behavioral code.

* iverilog-vpi uses the compiler selected at build time.

* Rework handling of strings to handle escape sequences properly.

* Fix some handling of real values in some expression types.

* Get padding of sized, unsigned numbers when x or z are involved.

* Many, many more misc. bug fixes.

* Add an assert mechinism that improves usefulness of bug reports by
  reporting source file line numbers when available.

* Compile fixes, using inttypes.h instead of stdint for portability.

* Various spelling fixes.

diffstat:

 cad/verilog-current/Makefile |  4 ++--
 cad/verilog-current/distinfo |  8 ++++----
 2 files changed, 6 insertions(+), 6 deletions(-)

diffs (32 lines):

diff -r 54232409b9db -r f7a56ab407f3 cad/verilog-current/Makefile
--- a/cad/verilog-current/Makefile      Thu Mar 01 00:36:19 2007 +0000
+++ b/cad/verilog-current/Makefile      Thu Mar 01 01:03:45 2007 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile,v 1.54 2007/02/21 23:18:44 dmcmahill Exp $
+# $NetBSD: Makefile,v 1.55 2007/03/01 01:03:45 dmcmahill Exp $
 #
 
 DISTNAME=      verilog-${SNAPDATE}
@@ -17,7 +17,7 @@
 GCC_REQD+=     3.0
 USE_LANGUAGES= c c++
 
-SNAPDATE=              20070123
+SNAPDATE=              20070227
 GNU_CONFIGURE=         yes
 USE_TOOLS+=            bison gmake lex
 CONFIGURE_ARGS+=       --without-ipal
diff -r 54232409b9db -r f7a56ab407f3 cad/verilog-current/distinfo
--- a/cad/verilog-current/distinfo      Thu Mar 01 00:36:19 2007 +0000
+++ b/cad/verilog-current/distinfo      Thu Mar 01 01:03:45 2007 +0000
@@ -1,6 +1,6 @@
-$NetBSD: distinfo,v 1.28 2007/02/21 23:18:44 dmcmahill Exp $
+$NetBSD: distinfo,v 1.29 2007/03/01 01:03:45 dmcmahill Exp $
 
-SHA1 (verilog-20070123.tar.gz) = 6b737279fe876e039322a6c31457372073366ec1
-RMD160 (verilog-20070123.tar.gz) = 351ef57933d03064666f0b209448e76bb943c5fa
-Size (verilog-20070123.tar.gz) = 1577268 bytes
+SHA1 (verilog-20070227.tar.gz) = eb6f26393946505617b7a7e2405e760b92eefbf0
+RMD160 (verilog-20070227.tar.gz) = c9add1099fb07b50df3a5d232b3307d64bb235c9
+Size (verilog-20070227.tar.gz) = 1583940 bytes
 SHA1 (patch-ad) = 9492af75153405c49076f2dcd11d2dc338640514