CVS commit: pkgsrc/cad/verilog

["Joerg Sonnenberger" <joerg%netbsd.org@localhost>]

Module Name:    pkgsrc
Committed By:   joerg
Date:           Wed Feb 18 20:12:02 UTC 2015

Modified Files:
        pkgsrc/cad/verilog: distinfo
        pkgsrc/cad/verilog/patches: patch-vpi_Makefile

Log Message:
Fix race condition.


To generate a diff of this commit:
cvs rdiff -u -r1.18 -r1.19 pkgsrc/cad/verilog/distinfo
cvs rdiff -u -r1.1 -r1.2 pkgsrc/cad/verilog/patches/patch-vpi_Makefile

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.