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CVS commit: pkgsrc/cad/verilog



Module Name:    pkgsrc
Committed By:   joerg
Date:           Wed Jun  1 13:30:41 UTC 2016

Modified Files:
        pkgsrc/cad/verilog: Makefile

Log Message:
Force creation of dep directories to prevent race conditions during the
actual build.


To generate a diff of this commit:
cvs rdiff -u -r1.40 -r1.41 pkgsrc/cad/verilog/Makefile

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.




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