CVS commit: pkgsrc/cad

["John Nemeth" <jnemeth%netbsd.org@localhost>]

Module Name:    pkgsrc
Committed By:   jnemeth
Date:           Thu Oct 13 04:10:16 UTC 2016

Modified Files:
        pkgsrc/cad: Makefile

Log Message:
verilog is no longer


To generate a diff of this commit:
cvs rdiff -u -r1.91 -r1.92 pkgsrc/cad/Makefile

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: pkgsrc/cad/Makefile
diff -u pkgsrc/cad/Makefile:1.91 pkgsrc/cad/Makefile:1.92
--- pkgsrc/cad/Makefile:1.91    Sun Oct  9 13:15:03 2016
+++ pkgsrc/cad/Makefile Thu Oct 13 04:10:16 2016
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile,v 1.91 2016/10/09 13:15:03 kamil Exp $
+# $NetBSD: Makefile,v 1.92 2016/10/13 04:10:16 jnemeth Exp $
 #
 
 COMMENT=       CAD tools
@@ -62,7 +62,6 @@ SUBDIR+=      stdio-wcalc
 SUBDIR+=       tkgate
 SUBDIR+=       tnt-mmtl
 SUBDIR+=       transcalc
-SUBDIR+=       verilog
 SUBDIR+=       verilog-mode
 SUBDIR+=       veriwell
 SUBDIR+=       vipec