CVS commit: pkgsrc/cad/iverilog

["Makoto Fujiwara" <mef%netbsd.org@localhost>]

Module Name:    pkgsrc
Committed By:   mef
Date:           Sat Sep 21 21:04:39 UTC 2024

Modified Files:
        pkgsrc/cad/iverilog: Makefile PLIST distinfo

Log Message:
(cad/iverilog) Updated to 12.0.0

Stable version 12.0
 This is the first release in the Version 12 branch.


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 pkgsrc/cad/iverilog/Makefile
cvs rdiff -u -r1.1 -r1.2 pkgsrc/cad/iverilog/PLIST
cvs rdiff -u -r1.7 -r1.8 pkgsrc/cad/iverilog/distinfo

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: pkgsrc/cad/iverilog/Makefile
diff -u pkgsrc/cad/iverilog/Makefile:1.3 pkgsrc/cad/iverilog/Makefile:1.4
--- pkgsrc/cad/iverilog/Makefile:1.3    Sat May 18 14:49:59 2024
+++ pkgsrc/cad/iverilog/Makefile        Sat Sep 21 21:04:39 2024
@@ -1,6 +1,6 @@
-# $NetBSD: Makefile,v 1.3 2024/05/18 14:49:59 mef Exp $
+# $NetBSD: Makefile,v 1.4 2024/09/21 21:04:39 mef Exp $
 
-DISTNAME=      verilog-10.1.1
+DISTNAME=      verilog-12.0
 # There is confision in naming of this software, use iverilog as it's saner
 PKGNAME=       i${DISTNAME}
 CATEGORIES=    cad
@@ -13,19 +13,20 @@ COMMENT=    Verilog simulation and synthesi
 LICENSE=       gnu-gpl-v2
 
 USE_LANGUAGES= c c++
-WRKSRC=                ${WRKDIR}/${DISTNAME}
 
 GNU_CONFIGURE=         yes
-USE_TOOLS+=            gmake bison lex
+USE_TOOLS+=            gmake bison lex autoconf
 TEST_TARGET=           check
 
 INSTALLATION_DIRS+=    share/doc/ivl
 
+pre-configure:
+       (cd ${WRKSRC}; autoconf)
 # Additional files
 post-install:
        cd ${WRKSRC}; ${INSTALL_DATA} \
                QUICK_START.txt \
-               README.txt      \
+               README.md      \
        ${DESTDIR}${PREFIX}/share/doc/ivl
 
 .include "../../devel/gperf/buildlink3.mk"

Index: pkgsrc/cad/iverilog/PLIST
diff -u pkgsrc/cad/iverilog/PLIST:1.1 pkgsrc/cad/iverilog/PLIST:1.2
--- pkgsrc/cad/iverilog/PLIST:1.1       Sat Oct  8 23:01:45 2016
+++ pkgsrc/cad/iverilog/PLIST   Sat Sep 21 21:04:39 2024
@@ -1,4 +1,4 @@
-@comment $NetBSD: PLIST,v 1.1 2016/10/08 23:01:45 kamil Exp $
+@comment $NetBSD: PLIST,v 1.2 2024/09/21 21:04:39 mef Exp $
 bin/iverilog
 bin/iverilog-vpi
 bin/vvp
@@ -28,19 +28,15 @@ lib/ivl/sizer.tgt
 lib/ivl/stub-s.conf
 lib/ivl/stub.conf
 lib/ivl/stub.tgt
-lib/ivl/system.sft
 lib/ivl/system.vpi
-lib/ivl/v2005_math.sft
 lib/ivl/v2005_math.vpi
-lib/ivl/v2009.sft
 lib/ivl/v2009.vpi
-lib/ivl/va_math.sft
 lib/ivl/va_math.vpi
 lib/ivl/vhdl-s.conf
 lib/ivl/vhdl.conf
 lib/ivl/vhdl.tgt
-lib/ivl/vhdl_sys.sft
 lib/ivl/vhdl_sys.vpi
+lib/ivl/vhdl_textio.vpi
 lib/ivl/vhdlpp
 lib/ivl/vlog95-s.conf
 lib/ivl/vlog95.conf
@@ -55,4 +51,4 @@ man/man1/iverilog-vpi.1
 man/man1/iverilog.1
 man/man1/vvp.1
 share/doc/ivl/QUICK_START.txt
-share/doc/ivl/README.txt
+share/doc/ivl/README.md

Index: pkgsrc/cad/iverilog/distinfo
diff -u pkgsrc/cad/iverilog/distinfo:1.7 pkgsrc/cad/iverilog/distinfo:1.8
--- pkgsrc/cad/iverilog/distinfo:1.7    Tue Oct 26 10:04:12 2021
+++ pkgsrc/cad/iverilog/distinfo        Sat Sep 21 21:04:39 2024
@@ -1,11 +1,7 @@
-$NetBSD: distinfo,v 1.7 2021/10/26 10:04:12 nia Exp $
+$NetBSD: distinfo,v 1.8 2024/09/21 21:04:39 mef Exp $
 
-BLAKE2s (verilog-10.1.1.tar.gz) = 38f2a53161eafb79b460b24ec3087fa85d2c43b5e98e76665ed75e4d90ab1c71
-SHA512 (verilog-10.1.1.tar.gz) = a57fdce3d870be8ce39eb3050dabd5a2d4d491c657b85ccbf775bef7fa9a6889a18bf4d2508341ef2cc17d872b5d6c802d4fd8585e4ec7952526699ebb24bfac
-Size (verilog-10.1.1.tar.gz) = 1684925 bytes
-SHA1 (patch-Makefile.in) = 9e66fedfa8487be3b7f82c152504404545f8bd06
+BLAKE2s (verilog-12.0.tar.gz) = a33ac3b9c33cc7600355da36a64b82411d00eb26c385b717052a0817aa1ee22b
+SHA512 (verilog-12.0.tar.gz) = a8e112f760903335ef2fbf00529e5fe282b83c1f583c4316373b9410d7fad2a53d5c4adb82dd62491c14a620cb5b1fab117cb0cde638c86b65fe5b7b0dd07152
+Size (verilog-12.0.tar.gz) = 2995096 bytes
 SHA1 (patch-aa) = cf075110416f6db0892129796cd83b8ae8de55fa
 SHA1 (patch-cadpli_Makefile.in) = ed21a5f529ac449c26b831cbd5fde052d9ed5466
-SHA1 (patch-tgt-pcb_Makefile.in) = 0ea212a678aabd7e3d131322fd1a867b3e22611f
-SHA1 (patch-vhdlpp_Makefile.in) = feed15f8e8e60c73b0f1f25a62d30fec7fa25a01
-SHA1 (patch-vvp_Makefile.in) = 67bef8f6bbf03c8cf548785f5d8124e03771026a