Re: Pegasos dmesg

[Frank Wille <frank%phoenix.owl.de@localhost>]

Tim Rightnour wrote:

On 20.01.08 06:20:17 you wrote:

>> I have disabled radeonfb and genfb now. Or do I really have to check for
>> the Radeon in genofw_pci_conf_hook?
> 
> No.. what I meant is that we have to avoid configuring the radeon (or any
> VGA CLASS device for that matter) in the pci_conf_hook.

So the easiest solution would be to run pci_configure_bus() on the primary
PCI bus @0x80000000 only, and leave the secondary for "AGP-emulation" alone?


>> For example the "pciio" extent is created from 0x8000 to 0xffff, although
>> the I/O ranges assigned by OFW are all between 0x1000 and 0x1200...?
> 
> The pciio are probably not the problem. It's more likely the mem ones. Let
> me try to explain, with an example.
> 
> Lets take this card from my 7044, an esiop:
> 
>    Base address register at 0x14
>      type: 32-bit nonprefetchable memory
>      base: 0xc0103000, size: 0x00000100
> 
> now, lets notice a few things about that. First, the base seems to contain
> the 0xc as the starting address, and then moves upwards from there.
> Second, it seems to also be inhabiting the 0xc01 range. Now look at the
> ranges the pchb can map, on this machine, it happens to be 0xc-0xd.
> Finally, look at all the other mem BARs and see what ranges they normally
> inhabit. You should be able to generate a rough estimate, of what the
> final ranges should be when you are done.

Ok. For the Pegasos2 the primary pchb maps pcimem at 0x80000000-0xbfffffff.
But all the devices are usually limited to the 0x8 range.

When looking at vmparam.h, we need 0xa and 0xb for KERNEL_SR and KERNEL2_SR,
so I would limit the mem extent to 0x80000000-0x9fffffff.


> now, lets look at ofwpci's mem extent:
> 
> memext = extent_create("pcimem", sc->sc_memt.pbs_base,
> sc->sc_memt.pbs_limit,
> 
> So we are saying that the ranges it will map those cards to, lies between
> pbs.base (0xc) and pbs.limit (0xd).

Then pbs_limit is not absolutely correct, because extent_create needs the
last address to include into the extent: pbs_limit - 1.

But I'm still unsure if extent_create gets an offset to the pchb base address
or the real physical addresses? Your example here lets me think the latter,
but in the prep port you create a mem extent for 0x00000000-0x0fffffff,
which is rather strange...?


> I hope that makes sense.  It's a little confusing at first.

Yes, a little bit. :)

Now I changed pegasospci.c to do the following in attach():

#ifdef PCI_NETBSD_CONFIGURE
    if (isprim) {
        ioext  = extent_create("pciio",  0x00001000, 0x00003fff,
            M_DEVBUF, NULL, 0, EX_NOWAIT);
        memext = extent_create("pcimem", 0x80000000, 0x9fffffff,
            M_DEVBUF, NULL, 0, EX_NOWAIT);
        if (pci_configure_bus(pc, ioext, memext, NULL, 0,
            CACHELINESIZE))
            printf("pci_configure_bus() failed\n");
        extent_destroy(ioext);
        extent_destroy(memext);
    }
#endif /* PCI_NETBSD_CONFIGURE */


But it doesn't work much better. Refer to the attached dmesg.

It no longer maps the audio device correctly:
auvia0 at pci0 dev 12 function 5bus_space_map(0xa005acd8[0:10000], 0x1000, 
0x100) failed: 35
: can't map i/o space

The viaide is not recognized as being in native mode:
viaide0 at pci0 dev 12 function 1
viaide0: VIA Technologies VT8231 ATA100 controller
viaide0: primary channel interrupting at irq 14
atabus0 at viaide0 channel 0

And it still hangs after /sbin/init.

-- 
    _  Frank Wille (frank%phoenix.owl.de@localhost)
 _ //  http://sun.hasenbraten.de/~frank/
 \X/   Phx @ #AmigaGer