On Sat, Nov 24, 2007 at 09:55:21AM -0500, Michael wrote:
> -----BEGIN PGP SIGNED MESSAGE-----
> Hash: SHA1
> 
> Hello,
> 
> On Nov 24, 2007, at 07:13, Pavel Cahyna wrote:
> 
> >On Fri, Nov 23, 2007 at 09:13:09AM -0500, Michael Lorenz wrote:
> >>
> >>Hello,
> >>
> >>On Nov 23, 2007, at 03:47, Pavel Cahyna wrote:
> >>
> >>>On Thu, Nov 22, 2007 at 05:55:01PM -0500, Michael Lorenz wrote:
> >>>>With PCI graphics cards it's more complicated. Cards based on ATI Mach64
> >>>>chips
> >>>>should work as long as they use a Rage II or Rage Pro ( also used on U5/U10
> >>>>and
> >>>>a few other mainboards ). Cards based on Rage XL chips are untested but
> >>>>should
> >>>>work, I have a Rage XL but with PC firmware so it's not very useful here.
> >>>
> >>>When I have tried machfb with a Rage XL card last time, it crashed during
> >>>boot. That was on alpha and the card works fine with XFree86.
> >>
> >>Machfb attaches but misdetects a whole bunch of things ( like memory size ) -
> >>kind of similar to machfb attaching to a Rage 128 ( the XL has a 64MB 
> >>aperture,
> >>unlike older mach64 which use only 16MB ) - I wonder if the XL is some sort 
> >>of
> >>unholy bastard between the two. Guess I should read more driver source to see
> >>where they special-case the XL.
> >
> >the panic message is:
> >machfb0 at pci0 dev 9 function 0: ATI Technologies Rage XL (rev. 0x27)
> >panic
> 
> Please mail me the card's pcictl dump output.


PCI configuration registers:
  Common header:
    0x00: 0x47521002 0x02900087 0x03000027 0x00000000

    Vendor Name: ATI Technologies (0x1002)
    Device Name: Rage XL (0x4752)
    Command register: 0x0087
      I/O space accesses: on
      Memory space accesses: on
      Bus mastering: on
      Special cycles: off
      MWI transactions: off
      Palette snooping: off
      Parity error checking: off
      Address/data stepping: on
      System error (SERR): off
      Fast back-to-back transactions: off
      Interrupt disable: off
    Status register: 0x0290
      Capability List support: on
      66 MHz capable: off
      User Definable Features (UDF) support: off
      Fast back-to-back capable: on
      Data parity error detected: off
      DEVSEL timing: medium (0x1)
      Slave signaled Target Abort: off
      Master received Target Abort: off
      Master received Master Abort: off
      Asserted System Error (SERR): off
      Parity error detected: off
    Class Name: display (0x03)
    Subclass Name: VGA (0x00)
    Interface: 0x00
    Revision ID: 0x27
    BIST: 0x00
    Header Type: 0x00 (0x00)
    Latency Timer: 0x00
    Cache Line Size: 0x00

  Type 0 ("normal" device) header:
    0x10: 0x82000000 0x00001201 0x83082000 0x00000000
    0x20: 0x00000000 0x00000000 0x00000000 0x80081002
    0x30: 0x83060000 0x0000005c 0x00000000 0x00080103

    Base address register at 0x10
      type: 32-bit nonprefetchable memory
      base: 0x82000000, not sized
    Base address register at 0x14
      type: i/o
      base: 0x00001200, not sized
    Base address register at 0x18
      type: 32-bit nonprefetchable memory
      base: 0x83082000, not sized
    Base address register at 0x1c
      not implemented(?)
    Base address register at 0x20
      not implemented(?)
    Base address register at 0x24
      not implemented(?)
    Cardbus CIS Pointer: 0x00000000
    Subsystem vendor ID: 0x1002
    Subsystem ID: 0x8008
    Expansion ROM Base Address: 0x83060000
    Capability list pointer: 0x5c
    Reserved @ 0x38: 0x00000000
    Maximum Latency: 0x00
    Minimum Grant: 0x08
    Interrupt pin: 0x01 (pin A)
    Interrupt line: 0x03

  Capability register at 0x5c
    type: 0x01 (Power Management, rev. 1.0)

  Device-dependent header:
    0x40: 0x0000000c 0x00000000 0x00000000 0x00000000
    0x50: 0x00105c02 0xff000001 0x00000000 0x06020001
    0x60: 0x00000000 0x00000000 0x00000000 0x00000000
    0x70: 0x00000000 0x00000000 0x00000000 0x00000000
    0x80: 0x00000000 0x00000000 0x00000000 0x00000000
    0x90: 0x00000000 0x00000000 0x00000000 0x00000000
    0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xf0: 0x00000000 0x00000000 0x00000000 0x00000000

> Is your alpha somehow limited in how much PCI memory it can map? I've seen my 
> SS20 run out of page entries with too many SBus graphics boards.

I don't think so - how would XFree86 work? Alpha does not have "page
entries" whatever it is, AFAIK. It has TLB entries, but I don't think that
a mapping has to be fully covered by them.

Pavel