Re: Netra X1 with WD0 and AcerIDE

["Maurizio Caloro" <mauric%gmx.ch@localhost>]

Hello together
i try now with both Version one with Kernel modifi and the oder change with 
aceride.c change and all the same Error apiar ?

Please help
Maurizio

Sun Netra X1 (UltraSPARC-IIe 500MHz), No Keyboard
OpenBoot 4.0, 1024 MB memory installed, Serial #51354397.
Ethernet address 0:3:ba:f:9b:1d, Host ID: 830f9b1d.



Executing last command: boot
Boot device: /pci@1f,0/ide@d/disk@0,0:a  File and args:
NetBSD IEEE 1275 Bootblock
>> NetBSD/sparc64 OpenFirmware Boot, Revision 1.13
=0x84863c
Loading netbsd: 7672322+296456+349136 [346656+333944]=0x9440b4
Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
    2006, 2007, 2008, 2009, 2010
    The NetBSD Foundation, Inc.  All rights reserved.
Copyright (c) 1982, 1986, 1989, 1991, 1993
    The Regents of the University of California.  All rights reserved.

NetBSD 5.1_RC4 (Netra_X1) #0: Tue Oct 26 16:37:19 CEST 2010
        maurizio@NetraX1.:/usr/src/sys/arch/sparc64/compile/Netra_X1
total memory = 1024 MB
avail memory = 998 MB
mainbus0 (root): SUNW,UltraAX-i2 (Sun Netra X1): hostid 830f9b1d
cpu0 at mainbus0: SUNW,UltraSPARC-IIe @ 500 MHz, UPA id 0
cpu0: 16K instruction (32 b/l), 16K data (32 b/l), 256K external (64 b/l)
psycho0 at mainbus0
psycho0: SUNW,sabre: impl 0, version 0: ign 7c0 bus range 0 to 0; PCI bus 0
DVMA map: 60000000 to 80000000
IOTSB: 40b60000 to 40be0000
pci0 at psycho0
ebus0 at pci0 dev 7 function 0
ebus0: Acer Labs M1533 PCI-ISA Bridge, revision 0x00
dma at ebus0 addr 0-ffff ipl 42 not configured
rtc0 at ebus0 addr 70-71: mc146818 compatible time-of-day clock: m5819
power at ebus0 addr 2000-2007 ipl 35 not configured
lom0 at ebus0 addr 8010-8011 ipl 42: SUNW,lomh: LOMlite2 rev 3.10
com0 at ebus0 addr 3f8-3ff ipl 43: ns16550a, working fifo
com0: console
com1 at ebus0 addr 2e8-2ef ipl 43: ns16550a, working fifo
flashprom at ebus0 addr 0-7ffff not configured
alipm0 at pci0 dev 3 function 0: 74KHz clock
iic0 at alipm0: I2C bus
spdmem0 at iic0 addr 0x56
spdmem0: SDRAM memory, data ECC, 512MB, 133MHz (PC-1100)
spdmem1 at iic0 addr 0x57
spdmem1: SDRAM memory, data ECC, 512MB, 133MHz (PC-1100)
admtemp0 at iic0 addr 0x18: ADM1021 or compatible environmental sensor
tlp0 at pci0 dev 12 function 0: Davicom DM9102A Ethernet, pass 3.1
tlp0: interrupting at ivec 3006
tlp0: Ethernet address 00:03:ba:0f:9b:1d
dmphy0 at tlp0 phy 1: DM9102 10/100 media interface, rev. 0
dmphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto
tlp1 at pci0 dev 5 function 0: Davicom DM9102A Ethernet, pass 3.1
tlp1: interrupting at ivec 301c
tlp1: Ethernet address 00:03:ba:0f:9b:1d
dmphy1 at tlp1 phy 1: DM9102 10/100 media interface, rev. 0
dmphy1: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto
ohci0 at pci0 dev 10 function 0: Acer Labs M5237 USB 1.1 Host Controller (rev. 
0x03)
ohci0: interrupting at ivec 24
ohci0: OHCI version 1.0, legacy support
usb0 at ohci0: USB revision 1.0
aceride0 at pci0 dev 13 function 0
aceride0: Acer Labs M5229 UDMA IDE Controller (rev. 0xc3)
aceride0: using ivec 180c for native-PCI interrupt
atabus0 at aceride0 channel 0
atabus1 at aceride0 channel 1
pcons at mainbus0 not configured
No counter-timer -- using %tick at 500MHz as system clock.
uhub0 at usb0: Acer Labs OHCI root hub, class 9/0, rev 1.00/1.00, addr 1
wd0 at atabus0 drive 0: <ST3250823A>
wd0: 232 GB, 484521 cyl, 16 head, 63 sec, 512 bytes/sect x 488397168 sectors
Kernelized RAIDframe activated
root on wd0a dumps on wd0b
root file system type: ffs
exec /sbin/init: error 8
init: trying /sbin/oinit
exec /sbin/oinit: error 2
init: trying /sbin/init.bak
exec /sbin/init.bak: error 2
init path (default /sbin/init):
init: trying /sbin/init
exec /sbin/init: error 8
init path (default /sbin/oinit):
init: trying /sbin/oinit
exec /sbin/oinit: error 2
init path (default /sbin/init.bak):
init: trying /sbin/init.bak
exec /sbin/init.bak: error 2


-------- Original-Nachricht --------
> Datum: Tue, 26 Oct 2010 22:28:16 +0900 (JST)
> Von: Takeshi Nakayama <tn%catvmics.ne.jp@localhost>
> An: mauric%gmx.ch@localhost, martin%duskware.de@localhost
> CC: cross+netbsd%distal.com@localhost, fair%NetBSD.org@localhost, 
> port-sparc64%NetBSD.org@localhost
> Betreff: Re: Netra X1 with WD0 and AcerIDE

> >>> Martin Husemann <martin%duskware.de@localhost> wrote
> 
> > The real solution is to do this all automatically, like the code Takeshi
> > quoted from FreeBSD does.
> 
> I saw our codes have a helpful hook, so I made a quick fix.
> 
> I cannot test with over 137GB drive since my Netra have a couple of
> 120GB drives, so please test this.
> 
> -- Takeshi Nakayama
> 
> 
> Index: sys/dev/pci/aceride.c
> ===================================================================
> RCS file: /cvsroot/src/sys/dev/pci/aceride.c,v
> retrieving revision 1.27
> diff -u -d -r1.27 aceride.c
> --- sys/dev/pci/aceride.c     8 May 2010 19:49:02 -0000       1.27
> +++ sys/dev/pci/aceride.c     26 Oct 2010 13:12:03 -0000
> @@ -41,6 +41,7 @@
>  static void acer_chip_map(struct pciide_softc*, struct pci_attach_args*);
>  static void acer_setup_channel(struct ata_channel*);
>  static int  acer_pci_intr(void *);
> +static int  acer_dma_init(void *, int, int, void *, size_t, int);
>  
>  static int  aceride_match(device_t, cfdata_t, void *);
>  static void aceride_attach(device_t, device_t, void *);
> @@ -139,6 +140,12 @@
>                               sc->sc_wdcdev.sc_atac.atac_udma_cap = 2;
>               }
>               sc->sc_wdcdev.irqack = pciide_irqack;
> +             if (rev <= 0xc4) {
> +                     sc->sc_wdcdev.dma_init = acer_dma_init;
> +                     aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev,
> +                      "using PIO transfer above 137GB as workaround for "
> +                      "48bit DMA access bug, expect reduced performance\n");
> +             }
>       }
>  
>       sc->sc_wdcdev.sc_atac.atac_pio_cap = 4;
> @@ -370,3 +377,15 @@
>       }
>       return rv;
>  }
> +
> +static int
> +acer_dma_init(void *v, int channel, int drive, void *databuf,
> +    size_t datalen, int flags)
> +{
> +
> +     /* use PIO for LBA48 transfer */
> +     if (flags & WDC_DMA_LBA48)
> +             return EINVAL;
> +
> +     return pciide_dma_init(v, channel, drive, databuf, datalen, flags);
> +}

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