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Re: xen interrupt system



On Thursday 20 August 2009 18:07:31 Manuel Bouyer wrote:
> On Thu, Aug 20, 2009 at 05:53:45PM +0200, Christoph Egger wrote:
> > > > Why are we doing this in first place ?
> > > > Disabling ioapics doesn't really sound to be right.
> > >
> > > Because we don't know the state of the system. So we first
> > > disable all interrupt pins, and then reenable the ones we use.
> > > Maybe this could be skipped in the Xen case. It's probably worth a try.
> >
> > I tried but this alone had no effect.
> >
> > During boot, I also have this in serial output:
> > [...]
> > svwsata0: ServerWorks HT-1000 SATA Controller (rev. 0x00)
> > linkdev LNKS returned ACPI global irq 7, line 7
> > (XEN) io_apic.c:2292:
> > (XEN) ioapic_guest_write: apic=0, pin=7, old_irq=-1, new_irq=94
> > (XEN) ioapic_guest_write: old_entry=00000948, new_entry=0000a95e


> > (XEN) ioapic_guest_write: Installing bogus unmasked IO-APIC entry!

There's a C comment right before this message:

/* This pin leads nowhere but the guest has not masked it. */

When we this message, then Xen didn't really allocate the interrupt for us
since it does a more strict validation check if the irq we want to allocate
is really an ioapic interrupt. irq 94 is not an existing ioapic interrupt on 
that machine.

> > ioapic0: int7
> > 0x1a95e<vector=0x5e,delmode=0x1,logical,actlo,level,masked,dest=0x0>
> > 0xff000000<target=0xff>
> > svwsata0: using ioapic0 pin 7, event channel 7 for native-PCI interrupt
>
> We had an active entry for this pin. I guess Xen wants us to mask it
> before changing it (but a look in the sources would tell more), this is
> what the code in ioapic_attach() tries to do (in fact, it reprograms
> the apic from scratch).
> The old entry was IOAPIC_REDLO_DSTMOD, IOAPIC_REDLO_DEL_LOPRI and we're
> trying to add the IOAPIC_REDLO_ACTLO | IOAPIC_REDLO_LEVEL flags (in
> addition to changing the vector). I don't know why Xen says it's invalid,
> a look at the sources could give details about this.

Xen's recent interrupt change happened to support per-cpu vectors. I suppose
we need to change our way in allocating interrupts.

Christoph


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