[src/trunk]: src/sys/arch/arm/include Add some PMC event registers

[jmcneill <jmcneill%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/dfb64c6325d1
branches:  trunk
changeset: 320677:dfb64c6325d1
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Sun Jul 15 23:46:57 2018 +0000

description:
Add some PMC event registers

diffstat:

 sys/arch/arm/include/armreg.h |  10 +++++++++-
 1 files changed, 9 insertions(+), 1 deletions(-)

diffs (26 lines):

diff -r 7560dff174c1 -r dfb64c6325d1 sys/arch/arm/include/armreg.h
--- a/sys/arch/arm/include/armreg.h     Sun Jul 15 23:46:25 2018 +0000
+++ b/sys/arch/arm/include/armreg.h     Sun Jul 15 23:46:57 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: armreg.h,v 1.121 2018/05/14 17:15:54 joerg Exp $       */
+/*     $NetBSD: armreg.h,v 1.122 2018/07/15 23:46:57 jmcneill Exp $    */
 
 /*
  * Copyright (c) 1998, 2001 Ben Harris
@@ -835,8 +835,16 @@
 ARMREG_WRITE_INLINE(pmcntenclr, "p15,0,%0,c9,c12,2") /* PMC Count Enable Clear */
 ARMREG_READ_INLINE(pmovsr, "p15,0,%0,c9,c12,3") /* PMC Overflow Flag Status */
 ARMREG_WRITE_INLINE(pmovsr, "p15,0,%0,c9,c12,3") /* PMC Overflow Flag Status */
+ARMREG_READ_INLINE(pmselr, "p15,0,%0,c9,c12,5") /* PMC Event Counter Selection */
+ARMREG_WRITE_INLINE(pmselr, "p15,0,%0,c9,c12,5") /* PMC Event Counter Selection */
+ARMREG_READ_INLINE(pmceid0, "p15,0,%0,c9,c12,6") /* PMC Event ID 0 */
+ARMREG_READ_INLINE(pmceid1, "p15,0,%0,c9,c12,7") /* PMC Event ID 1 */
 ARMREG_READ_INLINE(pmccntr, "p15,0,%0,c9,c13,0") /* PMC Cycle Counter */
 ARMREG_WRITE_INLINE(pmccntr, "p15,0,%0,c9,c13,0") /* PMC Cycle Counter */
+ARMREG_READ_INLINE(pmxevtyper, "p15,0,%0,c9,c13,1") /* PMC Event Type Select */
+ARMREG_WRITE_INLINE(pmxevtyper, "p15,0,%0,c9,c13,1") /* PMC Event Type Select */
+ARMREG_READ_INLINE(pmxevcntr, "p15,0,%0,c9,c13,2") /* PMC Event Count */
+ARMREG_WRITE_INLINE(pmxevcntr, "p15,0,%0,c9,c13,2") /* PMC Event Count */
 ARMREG_READ_INLINE(pmuserenr, "p15,0,%0,c9,c14,0") /* PMC User Enable */
 ARMREG_WRITE_INLINE(pmuserenr, "p15,0,%0,c9,c14,0") /* PMC User Enable */
 ARMREG_READ_INLINE(pmintenset, "p15,0,%0,c9,c14,1") /* PMC Interrupt Enable Set */