[src/trunk]: src/sys/arch/arm/allwinner More CPUCFG registers

[matt <matt%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/247b031bc7b9
branches:  trunk
changeset: 327675:247b031bc7b9
user:      matt <matt%NetBSD.org@localhost>
date:      Thu Mar 13 23:44:31 2014 +0000

description:
More CPUCFG registers

diffstat:

 sys/arch/arm/allwinner/awin_reg.h |  11 +++++++++++
 1 files changed, 11 insertions(+), 0 deletions(-)

diffs (29 lines):

diff -r 7f6efadfc3f1 -r 247b031bc7b9 sys/arch/arm/allwinner/awin_reg.h
--- a/sys/arch/arm/allwinner/awin_reg.h Thu Mar 13 21:11:12 2014 +0000
+++ b/sys/arch/arm/allwinner/awin_reg.h Thu Mar 13 23:44:31 2014 +0000
@@ -622,7 +622,12 @@
 #define AWIN_CPUCFG_CPU1_RST_CTRL_REG  0x0080
 #define AWIN_CPUCFG_CPU1_CTRL_REG      0x0084
 #define AWIN_CPUCFG_CPU1_STATUS_REG    0x0088
+#define AWIN_CPUCFG_GENCTRL_REG                0x0184
 #define AWIN_CPUCFG_PRIVATE_REG                0x01A4
+#define AWIN_CPUCFG_CPU1_PWRCLAMP_REG  0x01B0
+#define AWIN_CPUCFG_CPU1_PWROFF_REG    0x01B4
+#define AWIN_CPUCFG_DBGCTRL0_REG       0x01E0
+#define AWIN_CPUCFG_DBGCTRL1_REG       0x01E4
 
 #define AWIN_CPUCFG_CPU_RST_CTRL_CORE_RESET __BIT(1)
 #define AWIN_CPUCFG_CPU_RST_CTRL_RESET __BIT(0)
@@ -633,6 +638,12 @@
 #define AWIN_CPUCFG_CPU_STATUS_STANDBYWFE      __BIT(1)
 #define AWIN_CPUCFG_CPU_STATUS_SMP_AMP         __BIT(0)
 
+#define AWIN_CPUCFG_GENCTRL_CPU1_L1INV         __BIT(1)
+#define AWIN_CPUCFG_GENCTRL_CPU0_L1INV         __BIT(0)
+
+#define AWIN_CPUCFG_DBGCTL0_CPU1_DBGPWRDUP     __BIT(1)
+#define AWIN_CPUCFG_DBGCTL0_CPU0_DBGPWRDUP     __BIT(1)
+
 #define AWIN_PLL1_CFG_REG              0x0000
 #define AWIN_PLL1_TUN_REG              0x0004
 #define AWIN_PLL2_CFG_REG              0x0008