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[src/trunk]: src/sys/arch/arm Add Amlogic Meson SDHC driver (non-standard bin...
details: https://anonhg.NetBSD.org/src/rev/38c8c2c2a519
branches: trunk
changeset: 448055:38c8c2c2a519
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Sun Jan 20 00:44:01 2019 +0000
description:
Add Amlogic Meson SDHC driver (non-standard bindings)
diffstat:
sys/arch/arm/amlogic/files.meson | 8 +-
sys/arch/arm/amlogic/meson_sdhc.c | 978 ++++++++++++++++++++++++++++++++++
sys/arch/arm/amlogic/meson_sdhcreg.h | 150 +++++
sys/arch/arm/dts/meson8b-odroidc1.dts | 22 +-
sys/arch/arm/dts/meson8b.dtsi | 24 +-
5 files changed, 1176 insertions(+), 6 deletions(-)
diffs (truncated from 1226 to 300 lines):
diff -r 3f13dc80ceea -r 38c8c2c2a519 sys/arch/arm/amlogic/files.meson
--- a/sys/arch/arm/amlogic/files.meson Sat Jan 19 21:44:02 2019 +0000
+++ b/sys/arch/arm/amlogic/files.meson Sun Jan 20 00:44:01 2019 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: files.meson,v 1.2 2019/01/19 21:43:43 jmcneill Exp $
+# $NetBSD: files.meson,v 1.3 2019/01/20 00:44:01 jmcneill Exp $
#
# Configuration info for Amlogic Meson family SoCs
#
@@ -43,9 +43,9 @@
file arch/arm/amlogic/meson8b_pinctrl.c meson_pinctrl & soc_meson8b
# SDHC
-#device mesonsdhc: sdmmcbus
-#attach mesonsdhc at fdt with meson_sdhc
-#file arch/arm/amlogic/meson_sdhc.c meson_sdhc
+device mesonsdhc: sdmmcbus
+attach mesonsdhc at fdt with meson_sdhc
+file arch/arm/amlogic/meson_sdhc.c meson_sdhc
# SDIO
device mesonsdio: sdmmcbus
diff -r 3f13dc80ceea -r 38c8c2c2a519 sys/arch/arm/amlogic/meson_sdhc.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/arm/amlogic/meson_sdhc.c Sun Jan 20 00:44:01 2019 +0000
@@ -0,0 +1,978 @@
+/* $NetBSD: meson_sdhc.c,v 1.1 2019/01/20 00:44:01 jmcneill Exp $ */
+
+/*-
+ * Copyright (c) 2015-2019 Jared McNeill <jmcneill%invisible.ca@localhost>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: meson_sdhc.c,v 1.1 2019/01/20 00:44:01 jmcneill Exp $");
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/device.h>
+#include <sys/intr.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/gpio.h>
+
+#include <dev/sdmmc/sdmmcvar.h>
+#include <dev/sdmmc/sdmmcchip.h>
+#include <dev/sdmmc/sdmmc_ioreg.h>
+
+#include <dev/fdt/fdtvar.h>
+
+#include <arm/amlogic/meson_sdhcreg.h>
+
+enum {
+ SDHC_PORT_A = 0,
+ SDHC_PORT_B = 1,
+ SDHC_PORT_C = 2
+};
+
+static int meson_sdhc_match(device_t, cfdata_t, void *);
+static void meson_sdhc_attach(device_t, device_t, void *);
+static void meson_sdhc_attach_i(device_t);
+
+static int meson_sdhc_intr(void *);
+
+struct meson_sdhc_softc {
+ device_t sc_dev;
+ bus_space_tag_t sc_bst;
+ bus_space_handle_t sc_bsh;
+ bus_dma_tag_t sc_dmat;
+ void *sc_ih;
+
+ device_t sc_sdmmc_dev;
+ kmutex_t sc_intr_lock;
+ kcondvar_t sc_intr_cv;
+
+ uint32_t sc_intr_ista;
+
+ bus_dmamap_t sc_dmamap;
+ bus_dma_segment_t sc_segs[1];
+ void *sc_bbuf;
+
+ u_int sc_bus_freq;
+
+ struct fdtbus_gpio_pin *sc_gpio_cd;
+ int sc_gpio_cd_inverted;
+ struct fdtbus_gpio_pin *sc_gpio_wp;
+ int sc_gpio_wp_inverted;
+
+ struct fdtbus_regulator *sc_reg_vmmc;
+ struct fdtbus_regulator *sc_reg_vqmmc;
+
+ bool sc_non_removable;
+ bool sc_broken_cd;
+
+ int sc_port;
+ int sc_slot_phandle;
+ int sc_signal_voltage;
+};
+
+CFATTACH_DECL_NEW(meson_sdhc, sizeof(struct meson_sdhc_softc),
+ meson_sdhc_match, meson_sdhc_attach, NULL, NULL);
+
+static int meson_sdhc_host_reset(sdmmc_chipset_handle_t);
+static uint32_t meson_sdhc_host_ocr(sdmmc_chipset_handle_t);
+static int meson_sdhc_host_maxblklen(sdmmc_chipset_handle_t);
+static int meson_sdhc_card_detect(sdmmc_chipset_handle_t);
+static int meson_sdhc_write_protect(sdmmc_chipset_handle_t);
+static int meson_sdhc_bus_power(sdmmc_chipset_handle_t, uint32_t);
+static int meson_sdhc_bus_clock(sdmmc_chipset_handle_t, int);
+static int meson_sdhc_bus_width(sdmmc_chipset_handle_t, int);
+static int meson_sdhc_bus_rod(sdmmc_chipset_handle_t, int);
+static void meson_sdhc_exec_command(sdmmc_chipset_handle_t,
+ struct sdmmc_command *);
+static void meson_sdhc_card_enable_intr(sdmmc_chipset_handle_t, int);
+static void meson_sdhc_card_intr_ack(sdmmc_chipset_handle_t);
+static int meson_sdhc_signal_voltage(sdmmc_chipset_handle_t, int);
+static int meson_sdhc_execute_tuning(sdmmc_chipset_handle_t, int);
+
+static int meson_sdhc_default_rx_phase(struct meson_sdhc_softc *);
+static int meson_sdhc_set_clock(struct meson_sdhc_softc *, u_int);
+static int meson_sdhc_wait_idle(struct meson_sdhc_softc *);
+static int meson_sdhc_wait_ista(struct meson_sdhc_softc *, uint32_t, int);
+
+static void meson_sdhc_dmainit(struct meson_sdhc_softc *);
+
+static struct sdmmc_chip_functions meson_sdhc_chip_functions = {
+ .host_reset = meson_sdhc_host_reset,
+ .host_ocr = meson_sdhc_host_ocr,
+ .host_maxblklen = meson_sdhc_host_maxblklen,
+ .card_detect = meson_sdhc_card_detect,
+ .write_protect = meson_sdhc_write_protect,
+ .bus_power = meson_sdhc_bus_power,
+ .bus_clock = meson_sdhc_bus_clock,
+ .bus_width = meson_sdhc_bus_width,
+ .bus_rod = meson_sdhc_bus_rod,
+ .exec_command = meson_sdhc_exec_command,
+ .card_enable_intr = meson_sdhc_card_enable_intr,
+ .card_intr_ack = meson_sdhc_card_intr_ack,
+ .signal_voltage = meson_sdhc_signal_voltage,
+ .execute_tuning = meson_sdhc_execute_tuning,
+};
+
+#define SDHC_WRITE(sc, reg, val) \
+ bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
+#define SDHC_READ(sc, reg) \
+ bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg))
+#define SDHC_SET_CLEAR meson_sdhc_set_clear
+
+static inline void
+meson_sdhc_set_clear(struct meson_sdhc_softc *sc, bus_addr_t reg, uint32_t set, uint32_t clr)
+{
+ const uint32_t old = SDHC_READ(sc, reg);
+ const uint32_t new = set | (old & ~clr);
+ if (old != new)
+ SDHC_WRITE(sc, reg, new);
+}
+
+static const char * const compatible[] = {
+ "amlogic,meson8b-sdhc",
+ NULL
+};
+
+static const char * const slot_compatible[] = {
+ "mmc-slot",
+ NULL
+};
+
+static int
+meson_sdhc_match(device_t parent, cfdata_t cf, void *aux)
+{
+ struct fdt_attach_args * const faa = aux;
+
+ return of_match_compatible(faa->faa_phandle, compatible);
+}
+
+static void
+meson_sdhc_attach(device_t parent, device_t self, void *aux)
+{
+ struct meson_sdhc_softc * const sc = device_private(self);
+ struct fdt_attach_args * const faa = aux;
+ const int phandle = faa->faa_phandle;
+ char intrstr[128];
+ struct clk *clk_clkin, *clk_core;
+ bus_addr_t addr, port;
+ bus_size_t size;
+ int child;
+
+ if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
+ aprint_error(": couldn't get registers\n");
+ return;
+ }
+
+ if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
+ aprint_error(": failed to decode interrupt\n");
+ return;
+ }
+
+ clk_core = fdtbus_clock_get(phandle, "core");
+ if (clk_core == NULL || clk_enable(clk_core) != 0) {
+ aprint_error(": failed to enable core clock\n");
+ return;
+ }
+
+ clk_clkin = fdtbus_clock_get(phandle, "clkin");
+ if (clk_clkin == NULL || clk_enable(clk_clkin) != 0) {
+ aprint_error(": failed to get clkin clock\n");
+ return;
+ }
+
+ sc->sc_dev = self;
+ sc->sc_bst = faa->faa_bst;
+ sc->sc_dmat = faa->faa_dmat;
+ if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) {
+ aprint_error(": failed to map registers\n");
+ return;
+ }
+ mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_BIO);
+ cv_init(&sc->sc_intr_cv, "sdhcintr");
+ sc->sc_signal_voltage = SDMMC_SIGNAL_VOLTAGE_330;
+
+ sc->sc_port = -1;
+ for (child = OF_child(phandle); child; child = OF_peer(child))
+ if (of_match_compatible(child, slot_compatible) > 0) {
+ if (fdtbus_get_reg(child, 0, &port, NULL) == 0) {
+ sc->sc_slot_phandle = child;
+ sc->sc_port = port;
+ }
+ break;
+ }
+ if (sc->sc_port == -1) {
+ aprint_error(": couldn't get mmc slot\n");
+ return;
+ }
+
+ aprint_naive("\n");
+ aprint_normal(": SDHC controller (port %c)\n", sc->sc_port + 'A');
+
+ sc->sc_reg_vmmc = fdtbus_regulator_acquire(sc->sc_slot_phandle, "vmmc-supply");
+ sc->sc_reg_vqmmc = fdtbus_regulator_acquire(sc->sc_slot_phandle, "vqmmc-supply");
+
+ sc->sc_gpio_cd = fdtbus_gpio_acquire(sc->sc_slot_phandle, "cd-gpios",
+ GPIO_PIN_INPUT);
+ sc->sc_gpio_wp = fdtbus_gpio_acquire(sc->sc_slot_phandle, "wp-gpios",
+ GPIO_PIN_INPUT);
+
+ sc->sc_gpio_cd_inverted = of_hasprop(sc->sc_slot_phandle, "cd-inverted");
+ sc->sc_gpio_wp_inverted = of_hasprop(sc->sc_slot_phandle, "wp-inverted");
+
+ sc->sc_non_removable = of_hasprop(sc->sc_slot_phandle, "non-removable");
+ sc->sc_broken_cd = of_hasprop(sc->sc_slot_phandle, "broken-cd");
+
+ sc->sc_ih = fdtbus_intr_establish(phandle, 0, IPL_BIO, 0,
+ meson_sdhc_intr, sc);
+ if (sc->sc_ih == NULL) {
+ aprint_error_dev(self, "couldn't establish interrupt on %s\n",
+ intrstr);
+ return;
+ }
+ aprint_normal_dev(self, "interrupting on %s\n", intrstr);
+
+ sc->sc_bus_freq = clk_get_rate(clk_clkin);
+
+ aprint_normal_dev(self, "core %u Hz, clkin %u Hz\n", clk_get_rate(clk_core), clk_get_rate(clk_clkin));
+
+ meson_sdhc_dmainit(sc);
+
+ config_interrupts(self, meson_sdhc_attach_i);
+}
+
+static void
+meson_sdhc_attach_i(device_t self)
+{
+ struct meson_sdhc_softc *sc = device_private(self);
+ struct sdmmcbus_attach_args saa;
+ u_int pll_freq;
+
+ pll_freq = sc->sc_bus_freq / 1000;
+
+ meson_sdhc_host_reset(sc);
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