[src/trunk]: src/sys/arch/arm/sunxi sun4i: enable clocks for SPI[0-3], needed...

[tnn <tnn%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/ca5ed1067fe2
branches:  trunk
changeset: 458586:ca5ed1067fe2
user:      tnn <tnn%NetBSD.org@localhost>
date:      Thu Aug 01 22:23:16 2019 +0000

description:
sun4i: enable clocks for SPI[0-3], needed by sun4i_spi

diffstat:

 sys/arch/arm/sunxi/sun4i_a10_ccu.c |  40 ++++++++++++++++++++++++++++++++++++-
 1 files changed, 38 insertions(+), 2 deletions(-)

diffs (70 lines):

diff -r d3dd844c968f -r ca5ed1067fe2 sys/arch/arm/sunxi/sun4i_a10_ccu.c
--- a/sys/arch/arm/sunxi/sun4i_a10_ccu.c        Thu Aug 01 21:29:39 2019 +0000
+++ b/sys/arch/arm/sunxi/sun4i_a10_ccu.c        Thu Aug 01 22:23:16 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sun4i_a10_ccu.c,v 1.10 2019/01/22 23:06:49 jmcneill Exp $ */
+/* $NetBSD: sun4i_a10_ccu.c,v 1.11 2019/08/01 22:23:16 tnn Exp $ */
 
 /*-
  * Copyright (c) 2017 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -28,7 +28,7 @@
 
 #include <sys/cdefs.h>
 
-__KERNEL_RCSID(1, "$NetBSD: sun4i_a10_ccu.c,v 1.10 2019/01/22 23:06:49 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: sun4i_a10_ccu.c,v 1.11 2019/08/01 22:23:16 tnn Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -59,8 +59,12 @@
 #define        SD1_SCLK_CFG_REG        0x08c
 #define        SD2_SCLK_CFG_REG        0x090
 #define        SD3_SCLK_CFG_REG        0x094
+#define        SPI0_CLK_CFG_REG        0x0a0
+#define        SPI1_CLK_CFG_REG        0x0a4
+#define        SPI2_CLK_CFG_REG        0x0a8
 #define        SATA_CFG_REG            0x0c8
 #define        USBPHY_CFG_REG          0x0cc
+#define        SPI3_CLK_CFG_REG        0x0d4
 #define        DRAM_GATING_REG         0x100
 #define        BE0_CFG_REG             0x104
 #define        BE1_CFG_REG             0x108
@@ -270,6 +274,38 @@
            __BIT(31),                  /* enable */
            SUNXI_CCU_NM_POWER_OF_TWO),
 
+       SUNXI_CCU_NM(A10_CLK_SPI0, "spi0", mod_parents,
+           SPI0_CLK_CFG_REG,           /* reg */
+           __BITS(17,16),              /* n */
+           __BITS(3,0),                /* m */
+           __BITS(25,24),              /* sel */
+           __BIT(31),                  /* enable */
+           SUNXI_CCU_NM_POWER_OF_TWO),
+
+       SUNXI_CCU_NM(A10_CLK_SPI1, "spi1", mod_parents,
+           SPI1_CLK_CFG_REG,           /* reg */
+           __BITS(17,16),              /* n */
+           __BITS(3,0),                /* m */
+           __BITS(25,24),              /* sel */
+           __BIT(31),                  /* enable */
+           SUNXI_CCU_NM_POWER_OF_TWO),
+
+       SUNXI_CCU_NM(A10_CLK_SPI2, "spi2", mod_parents,
+           SPI2_CLK_CFG_REG,           /* reg */
+           __BITS(17,16),              /* n */
+           __BITS(3,0),                /* m */
+           __BITS(25,24),              /* sel */
+           __BIT(31),                  /* enable */
+           SUNXI_CCU_NM_POWER_OF_TWO),
+
+       SUNXI_CCU_NM(A10_CLK_SPI3, "spi3", mod_parents,
+           SPI3_CLK_CFG_REG,           /* reg */
+           __BITS(17,16),              /* n */
+           __BITS(3,0),                /* m */
+           __BITS(25,24),              /* sel */
+           __BIT(31),                  /* enable */
+           SUNXI_CCU_NM_POWER_OF_TWO),
+
        SUNXI_CCU_NM(A10_CLK_MMC0, "mmc0", mod_parents,
            SD0_SCLK_CFG_REG,           /* reg */
            __BITS(17,16),              /* n */