Source-Changes-HG archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
[src/trunk]: src/sys/arch/arm/arm32 Remove the Control register handling from...
details: https://anonhg.NetBSD.org/src/rev/5a3af6922460
branches: trunk
changeset: 525404:5a3af6922460
user: thorpej <thorpej%NetBSD.org@localhost>
date: Wed Apr 10 21:45:43 2002 +0000
description:
Remove the Control register handling from arm32_vector_init(). Apparently,
the ARM6 and ARM7 do completely the wrong thing if you read this register,
so we have to handle this a different way.
diffstat:
sys/arch/arm/arm32/arm32_machdep.c | 20 +-------------------
1 files changed, 1 insertions(+), 19 deletions(-)
diffs (43 lines):
diff -r 83c1eeded05a -r 5a3af6922460 sys/arch/arm/arm32/arm32_machdep.c
--- a/sys/arch/arm/arm32/arm32_machdep.c Wed Apr 10 21:12:15 2002 +0000
+++ b/sys/arch/arm/arm32/arm32_machdep.c Wed Apr 10 21:45:43 2002 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: arm32_machdep.c,v 1.22 2002/04/03 23:33:28 thorpej Exp $ */
+/* $NetBSD: arm32_machdep.c,v 1.23 2002/04/10 21:45:43 thorpej Exp $ */
/*
* Copyright (c) 1994-1998 Mark Brinicombe.
@@ -122,25 +122,8 @@
extern unsigned int page0[], page0_data[];
unsigned int *vectors = (int *) va;
unsigned int *vectors_data = vectors + (page0_data - page0);
- unsigned int ctrl;
int vec;
- /* Make sure we have a legal vector page VA. */
- switch (va) {
- case ARM_VECTORS_LOW:
- ctrl = 0;
- break;
-
- case ARM_VECTORS_HIGH:
- ctrl = CPU_CONTROL_VECRELOC;
- break;
-
- default:
- panic("arm32_vector_init: invalid vector address: 0x%08lx\n",
- va);
- /* NOTREACHED */
- }
-
/*
* Loop through the vectors we're taking over, and copy the
* vector's insn and data word.
@@ -158,7 +141,6 @@
cpu_icache_sync_range(va, (ARM_NVEC * 2) * sizeof(u_int));
vector_page = va;
- cpu_control(CPU_CONTROL_VECRELOC, ctrl);
}
/*
Home |
Main Index |
Thread Index |
Old Index