[src/trunk]: src/sys/arch/arm/arm32 * pmap_clean_page(): Clean up a comment.

[thorpej <thorpej%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/3e68457641e0
branches:  trunk
changeset: 526063:3e68457641e0
user:      thorpej <thorpej%NetBSD.org@localhost>
date:      Wed Apr 24 17:35:10 2002 +0000

description:
* pmap_clean_page(): Clean up a comment.
* pmap_protect(): write back the range when doing a r/w -> r/o
  transition.  (Still leave the block concerned with this in
  pmap_clean_page() disabled, for now.)
* pmap_pte_init_xscale(): Disable read/write-allocate for now, until
  we figure out why sometimes cache lines of NULs get deposited into
  file data.  Also, make sure ECC protection of page table access is
  disabled for now.
* xscale_setup_minidata(): Make sure the mini-data cache is configured
  write-back with read/write-allocate.

diffstat:

 sys/arch/arm/arm32/pmap.c |  74 +++++++++++++++++++++++++++++++++++-----------
 1 files changed, 56 insertions(+), 18 deletions(-)

diffs (133 lines):

diff -r c96e5d4049c1 -r 3e68457641e0 sys/arch/arm/arm32/pmap.c
--- a/sys/arch/arm/arm32/pmap.c Wed Apr 24 16:56:36 2002 +0000
+++ b/sys/arch/arm/arm32/pmap.c Wed Apr 24 17:35:10 2002 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pmap.c,v 1.95 2002/04/12 21:52:47 thorpej Exp $        */
+/*     $NetBSD: pmap.c,v 1.96 2002/04/24 17:35:10 thorpej Exp $        */
 
 /*
  * Copyright (c) 2002 Wasabi Systems, Inc.
@@ -143,7 +143,7 @@
 #include <machine/param.h>
 #include <arm/arm32/katelib.h>
 
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.95 2002/04/12 21:52:47 thorpej Exp $");        
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.96 2002/04/24 17:35:10 thorpej Exp $");        
 #ifdef PMAP_DEBUG
 #define        PDEBUG(_lev_,_stat_) \
        if (pmap_debug_level >= (_lev_)) \
@@ -1741,14 +1741,11 @@
                                break;
                        }
 #if 0
-                       /* This doesn't work, because pmap_protect
-                          doesn't flush changes on pages that it
-                          has write-protected.  */
-
-                       /* If the page is not writable and this
-                          is the source, then there is no need
-                          to flush it from the cache.  */
-                       else if (is_src && ! (npv->pv_flags & PVF_WRITE))
+                       /*
+                        * XXX Can't do this because pmap_protect doesn't
+                        * XXX clean the page when it does a write-protect.
+                        */
+                       else if (is_src && (npv->pv_flags & PVF_WRITE) == 0)
                                continue;
 #endif
                        if (cache_needs_cleaning){
@@ -2549,6 +2546,14 @@
        PMAP_MAP_TO_HEAD_LOCK();
        
        ptes = pmap_map_ptes(pmap);
+
+       /*
+        * OK, at this point, we know we're doing write-protect operation.
+        * If the pmap is active, write-back the range.
+        */
+       if (pmap_is_curpmap(pmap))
+               cpu_dcache_wb_range(sva, eva - sva);
+
        /*
         * We need to acquire a pointer to a page table page before entering
         * the following loop.
@@ -3800,18 +3805,15 @@
 void
 pmap_pte_init_xscale(void)
 {
-
-       /*
-        * Use write-back caching with read/write-allocate.
-        */
-
-       pte_l1_s_cache_mode = L1_S_B|L1_S_C|L1_S_XSCALE_TEX(TEX_XSCALE_X);
+       uint32_t auxctl;
+
+       pte_l1_s_cache_mode = L1_S_B|L1_S_C;
        pte_l1_s_cache_mask = L1_S_CACHE_MASK_xscale;
 
-       pte_l2_l_cache_mode = L2_B|L2_C|L2_XSCALE_L_TEX(TEX_XSCALE_X);
+       pte_l2_l_cache_mode = L2_B|L2_C;
        pte_l2_l_cache_mask = L2_L_CACHE_MASK_xscale;
 
-       pte_l2_s_cache_mode = L2_B|L2_C|L2_XSCALE_T_TEX(TEX_XSCALE_X);
+       pte_l2_s_cache_mode = L2_B|L2_C;
        pte_l2_s_cache_mask = L2_S_CACHE_MASK_xscale;
 
 #ifdef XSCALE_CACHE_WRITE_THROUGH
@@ -3841,6 +3843,16 @@
 
        pmap_copy_page_func = pmap_copy_page_xscale;
        pmap_zero_page_func = pmap_zero_page_xscale;
+
+       /*
+        * Disable ECC protection of page table access, for now.
+        */
+       __asm __volatile("mrc p15, 0, %0, c1, c0, 1"
+               : "=r" (auxctl));
+       auxctl &= ~XSCALE_AUXCTL_P;
+       __asm __volatile("mcr p15, 0, %0, c1, c0, 1"
+               :
+               : "r" (auxctl));
 }
 
 /*
@@ -3858,6 +3870,7 @@
        pd_entry_t *pde = (pd_entry_t *) l1pt;
        pt_entry_t *pte;
        vsize_t size;
+       uint32_t auxctl;
 
        xscale_minidata_clean_addr = va;
 
@@ -3875,5 +3888,30 @@
                    L2_S_PROT(PTE_KERNEL, VM_PROT_READ) |
                    L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X);
        }
+
+       /*
+        * Configure the mini-data cache for write-back with
+        * read/write-allocate.
+        *
+        * NOTE: In order to reconfigure the mini-data cache, we must
+        * make sure it contains no valid data!  In order to do that,
+        * we must issue a global data cache invalidate command!
+        *
+        * WE ASSUME WE ARE RUNNING UN-CACHED WHEN THIS ROUTINE IS CALLED!
+        * THIS IS VERY IMPORTANT!
+        */
+       
+       /* Invalidate data and mini-data. */
+       __asm __volatile("mcr p15, 0, %0, c7, c6, 0"
+               :
+               : "r" (auxctl));
+
+
+       __asm __volatile("mrc p15, 0, %0, c1, c0, 1"
+               : "=r" (auxctl));
+       auxctl = (auxctl & ~XSCALE_AUXCTL_MD_MASK) | XSCALE_AUXCTL_MD_WB_RWA;
+       __asm __volatile("mcr p15, 0, %0, c1, c0, 1"
+               :
+               : "r" (auxctl));
 }
 #endif /* ARM_MMU_XSCALE == 1 */