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[src/trunk]: src/sys/arch/mips/include Ensure the "memory" clobber is on inli...
details: https://anonhg.NetBSD.org/src/rev/5f25fb3e54b4
branches: trunk
changeset: 953258:5f25fb3e54b4
user: skrll <skrll%NetBSD.org@localhost>
date: Tue Mar 02 08:16:52 2021 +0000
description:
Ensure the "memory" clobber is on inline assembly store operations
No binary change of note with this change in MALTA32
diffstat:
sys/arch/mips/include/locore.h | 10 +++++-----
1 files changed, 5 insertions(+), 5 deletions(-)
diffs (45 lines):
diff -r a0cf769dff60 -r 5f25fb3e54b4 sys/arch/mips/include/locore.h
--- a/sys/arch/mips/include/locore.h Tue Mar 02 07:55:16 2021 +0000
+++ b/sys/arch/mips/include/locore.h Tue Mar 02 08:16:52 2021 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.h,v 1.116 2020/08/22 09:08:21 simonb Exp $ */
+/* $NetBSD: locore.h,v 1.117 2021/03/02 08:16:52 skrll Exp $ */
/*
* This file should not be included by MI code!!!
@@ -539,7 +539,7 @@
mips_sb(register_t addr, uint8_t val)
{
#if defined(__mips_n32)
- __asm volatile("sb\t%1, 0(%0)" :: "d"(addr), "r"(val));
+ __asm volatile("sb\t%1, 0(%0)" :: "d"(addr), "r"(val) : "memory");
#else
*(volatile uint8_t *)addr = val;
#endif
@@ -549,7 +549,7 @@
mips_sh(register_t addr, uint16_t val)
{
#if defined(__mips_n32)
- __asm volatile("sh\t%1, 0(%0)" :: "d"(addr), "r"(val));
+ __asm volatile("sh\t%1, 0(%0)" :: "d"(addr), "r"(val) : "memory");
#else
*(volatile uint16_t *)addr = val;
#endif
@@ -559,7 +559,7 @@
mips_sw(register_t addr, uint32_t val)
{
#if defined(__mips_n32)
- __asm volatile("sw\t%1, 0(%0)" :: "d"(addr), "r"(val));
+ __asm volatile("sw\t%1, 0(%0)" :: "d"(addr), "r"(val) : "memory");
#else
*(volatile uint32_t *)addr = val;
#endif
@@ -570,7 +570,7 @@
mips3_sd(register_t addr, uint64_t val)
{
#if defined(__mips_n32)
- __asm volatile("sd\t%1, 0(%0)" :: "d"(addr), "r"(val));
+ __asm volatile("sd\t%1, 0(%0)" :: "d"(addr), "r"(val) : "memory");
#else
*(volatile uint64_t *)addr = val;
#endif
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