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[src/trunk]: src/sys/dev/pci/ixgbe The EICR register are cleared in the begin...
details: https://anonhg.NetBSD.org/src/rev/6ffb2e2b6e03
branches: trunk
changeset: 958115:6ffb2e2b6e03
user: msaitoh <msaitoh%NetBSD.org@localhost>
date: Thu Dec 24 15:51:33 2020 +0000
description:
The EICR register are cleared in the beginning of the ixgbe_legacy_irq(),
so it's not required to clear each bit later in the function.
diffstat:
sys/dev/pci/ixgbe/ixgbe.c | 7 ++-----
1 files changed, 2 insertions(+), 5 deletions(-)
diffs (40 lines):
diff -r 288360782211 -r 6ffb2e2b6e03 sys/dev/pci/ixgbe/ixgbe.c
--- a/sys/dev/pci/ixgbe/ixgbe.c Thu Dec 24 15:51:04 2020 +0000
+++ b/sys/dev/pci/ixgbe/ixgbe.c Thu Dec 24 15:51:33 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: ixgbe.c,v 1.267 2020/12/24 15:51:04 msaitoh Exp $ */
+/* $NetBSD: ixgbe.c,v 1.268 2020/12/24 15:51:33 msaitoh Exp $ */
/******************************************************************************
@@ -5166,6 +5166,7 @@
/* Silicon errata #26 on 82598. Disable all interrupts */
IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
+ /* Read and clear EICR */
eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
adapter->stats.pf.legint.ev_count++;
@@ -5218,14 +5219,11 @@
if ((eicr & eicr_mask)
|| ((hw->phy.sfp_type == ixgbe_sfp_type_not_present)
&& (eicr & IXGBE_EICR_LSC))) {
- IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
task_requests |= IXGBE_REQUEST_TASK_MOD;
}
if ((hw->mac.type == ixgbe_mac_82599EB) &&
(eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw))) {
- IXGBE_WRITE_REG(hw, IXGBE_EICR,
- IXGBE_EICR_GPI_SDP1_BY_MAC(hw));
task_requests |= IXGBE_REQUEST_TASK_MSF;
}
}
@@ -5233,7 +5231,6 @@
/* Check for fan failure */
if (adapter->feat_en & IXGBE_FEATURE_FAN_FAIL) {
ixgbe_check_fan_failure(adapter, eicr, true);
- IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1_BY_MAC(hw));
}
/* External PHY interrupt */
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