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[src/trunk]: src Add ddb "mach reset" command for Arm ports.
details: https://anonhg.NetBSD.org/src/rev/36edd500b3f5
branches: trunk
changeset: 1011504:36edd500b3f5
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Thu Jul 02 11:10:47 2020 +0000
description:
Add ddb "mach reset" command for Arm ports.
diffstat:
share/man/man4/ddb.4 | 8 ++++++--
sys/arch/aarch64/aarch64/db_machdep.c | 23 +++++++++++++++++++++--
sys/arch/arm/arm32/db_machdep.c | 19 +++++++++++++++++--
3 files changed, 44 insertions(+), 6 deletions(-)
diffs (148 lines):
diff -r 57b9046bfa10 -r 36edd500b3f5 share/man/man4/ddb.4
--- a/share/man/man4/ddb.4 Thu Jul 02 11:08:55 2020 +0000
+++ b/share/man/man4/ddb.4 Thu Jul 02 11:10:47 2020 +0000
@@ -1,4 +1,4 @@
-.\" $NetBSD: ddb.4,v 1.189 2020/03/30 20:47:57 maya Exp $
+.\" $NetBSD: ddb.4,v 1.190 2020/07/02 11:10:47 jmcneill Exp $
.\"
.\" Copyright (c) 1997 - 2019 The NetBSD Foundation, Inc.
.\" All rights reserved.
@@ -56,7 +56,7 @@
.\" any improvements or extensions that they make and grant Carnegie Mellon
.\" the rights to redistribute these changes.
.\"
-.Dd March 30, 2020
+.Dd July 2, 2020
.Dt DDB 4
.Os
.Sh NAME
@@ -1018,6 +1018,8 @@
Print lwp information about the ``struct lwp''.
.It Ic pte
Print PTE information.
+.It Ic reset
+Reset the system.
.It Ic sysreg
Print system registers.
.It Ic watch
@@ -1063,6 +1065,8 @@
.Bl -tag -width "traptrace" -compact
.It Ic frame
Given a trap frame address, print out the trap frame.
+.It Ic reset
+Reset the system.
.El
.Ss HPPA
.Bl -tag -width "traptrace" -compact
diff -r 57b9046bfa10 -r 36edd500b3f5 sys/arch/aarch64/aarch64/db_machdep.c
--- a/sys/arch/aarch64/aarch64/db_machdep.c Thu Jul 02 11:08:55 2020 +0000
+++ b/sys/arch/aarch64/aarch64/db_machdep.c Thu Jul 02 11:10:47 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: db_machdep.c,v 1.24 2020/05/22 19:29:26 ryo Exp $ */
+/* $NetBSD: db_machdep.c,v 1.25 2020/07/02 11:10:48 jmcneill Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.24 2020/05/22 19:29:26 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.25 2020/07/02 11:10:48 jmcneill Exp $");
#ifdef _KERNEL_OPT
#include "opt_compat_netbsd32.h"
@@ -68,6 +68,7 @@
void db_md_frame_cmd(db_expr_t, bool, db_expr_t, const char *);
void db_md_lwp_cmd(db_expr_t, bool, db_expr_t, const char *);
void db_md_pte_cmd(db_expr_t, bool, db_expr_t, const char *);
+void db_md_reset_cmd(db_expr_t, bool, db_expr_t, const char *);
void db_md_tlbi_cmd(db_expr_t, bool, db_expr_t, const char *);
void db_md_ttbr_cmd(db_expr_t, bool, db_expr_t, const char *);
void db_md_sysreg_cmd(db_expr_t, bool, db_expr_t, const char *);
@@ -115,6 +116,12 @@
},
{
DDB_ADD_CMD(
+ "reset", db_md_reset_cmd, 0,
+ "Reset the system",
+ NULL, NULL)
+ },
+ {
+ DDB_ADD_CMD(
"sysreg", db_md_sysreg_cmd, 0,
"Displays system registers",
NULL, NULL)
@@ -453,6 +460,18 @@
}
void
+db_md_reset_cmd(db_expr_t addr, bool have_addr, db_expr_t count,
+ const char *modif)
+{
+ if (cpu_reset_address == NULL) {
+ db_printf("cpu_reset_address is not set\n");
+ return;
+ }
+
+ cpu_reset_address();
+}
+
+void
db_md_tlbi_cmd(db_expr_t addr, bool have_addr, db_expr_t count,
const char *modif)
{
diff -r 57b9046bfa10 -r 36edd500b3f5 sys/arch/arm/arm32/db_machdep.c
--- a/sys/arch/arm/arm32/db_machdep.c Thu Jul 02 11:08:55 2020 +0000
+++ b/sys/arch/arm/arm32/db_machdep.c Thu Jul 02 11:10:47 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: db_machdep.c,v 1.31 2020/06/20 07:10:36 skrll Exp $ */
+/* $NetBSD: db_machdep.c,v 1.32 2020/07/02 11:10:48 jmcneill Exp $ */
/*
* Copyright (c) 1996 Mark Brinicombe
@@ -34,7 +34,7 @@
#endif
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.31 2020/06/20 07:10:36 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.32 2020/07/02 11:10:48 jmcneill Exp $");
#include <sys/param.h>
@@ -44,6 +44,7 @@
#include <sys/systm.h>
#include <arm/arm32/db_machdep.h>
+#include <arm/arm32/machdep.h>
#include <arm/cpufunc.h>
#include <ddb/db_access.h>
@@ -131,6 +132,9 @@
"[address]",
" address:\taddress of trapfame to display")},
#ifdef _KERNEL
+ { DDB_ADD_CMD("reset", db_reset_cmd, 0,
+ "Reset the system",
+ NULL,NULL) },
#if defined(CPU_CORTEXA5) || defined(CPU_CORTEXA7)
{ DDB_ADD_CMD("tlb", db_show_tlb_cmd, 0,
"Displays the TLB",
@@ -205,6 +209,17 @@
armreg_ttbr_read());
}
+void
+db_reset_cmd(db_expr_t addr, bool have_addr, db_expr_t count, const char *modif)
+{
+ if (cpu_reset_address == NULL) {
+ db_printf("cpu_reset_address is not set\n");
+ return;
+ }
+
+ cpu_reset_address();
+}
+
#if defined(CPU_CORTEXA5) || defined(CPU_CORTEXA7)
static void
tlb_print_common_header(const char *str)
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