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[src/trunk]: src/sys/arch/aarch64/include The system registers we modify can ...
details: https://anonhg.NetBSD.org/src/rev/c9a9b2dd5861
branches: trunk
changeset: 1012501:c9a9b2dd5861
user: maxv <maxv%NetBSD.org@localhost>
date: Sat Aug 01 08:47:05 2020 +0000
description:
The system registers we modify can have an impact on memory accesses, and
we don't want the compiler to randomly re-order the instructions, so add
barriers. Same as WRMSR on x86.
diffstat:
sys/arch/aarch64/include/armreg.h | 12 ++++++++----
1 files changed, 8 insertions(+), 4 deletions(-)
diffs (40 lines):
diff -r 53304d5d46e3 -r c9a9b2dd5861 sys/arch/aarch64/include/armreg.h
--- a/sys/arch/aarch64/include/armreg.h Sat Aug 01 08:42:33 2020 +0000
+++ b/sys/arch/aarch64/include/armreg.h Sat Aug 01 08:47:05 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: armreg.h,v 1.50 2020/07/01 08:01:07 ryo Exp $ */
+/* $NetBSD: armreg.h,v 1.51 2020/08/01 08:47:05 maxv Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -66,7 +66,7 @@
{ \
__asm __volatile( \
ASM_ARCH(arch) \
- "msr " #regdesc ", %0" :: "r"(__val) \
+ "msr " #regdesc ", %0" :: "r"(__val) : "memory" \
); \
}
@@ -77,7 +77,9 @@
static __inline void \
reg_##regname##_write(uint64_t __val) \
{ \
- __asm __volatile("msr " #regdesc ", %0" :: "n"(__val)); \
+ __asm __volatile( \
+ "msr " #regdesc ", %0" :: "n"(__val) : "memory" \
+ ); \
}
#define AARCH64REG_READ_INLINE(regname) \
@@ -97,7 +99,9 @@
static __inline void \
reg_##regname##_write(uint64_t __val) \
{ \
- __asm __volatile("at " #regdesc ", %0" :: "r"(__val)); \
+ __asm __volatile( \
+ "at " #regdesc ", %0" :: "r"(__val) : "memory" \
+ ); \
}
#define AARCH64REG_ATWRITE_INLINE(regname) \
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