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[src/trunk]: src/sys/dev Disable ADMA2 on Ricoh SDHCI controllers.
details: https://anonhg.NetBSD.org/src/rev/eb67cbd622ae
branches: trunk
changeset: 371837:eb67cbd622ae
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Fri Oct 14 07:54:49 2022 +0000
description:
Disable ADMA2 on Ricoh SDHCI controllers.
PR# 57015
diffstat:
sys/dev/pci/sdhc_pci.c | 10 ++++++++--
sys/dev/sdmmc/sdhc.c | 7 ++++---
sys/dev/sdmmc/sdhcvar.h | 3 ++-
3 files changed, 14 insertions(+), 6 deletions(-)
diffs (104 lines):
diff -r 5203b725fc4e -r eb67cbd622ae sys/dev/pci/sdhc_pci.c
--- a/sys/dev/pci/sdhc_pci.c Fri Oct 14 07:44:28 2022 +0000
+++ b/sys/dev/pci/sdhc_pci.c Fri Oct 14 07:54:49 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sdhc_pci.c,v 1.18 2021/11/10 14:36:28 msaitoh Exp $ */
+/* $NetBSD: sdhc_pci.c,v 1.19 2022/10/14 07:54:49 jmcneill Exp $ */
/* $OpenBSD: sdhc_pci.c,v 1.7 2007/10/30 18:13:45 chl Exp $ */
/*
@@ -18,7 +18,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sdhc_pci.c,v 1.18 2021/11/10 14:36:28 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sdhc_pci.c,v 1.19 2022/10/14 07:54:49 jmcneill Exp $");
#ifdef _KERNEL_OPT
#include "opt_sdmmc.h"
@@ -88,6 +88,7 @@
#define SDHC_PCI_QUIRK_RICOH_SLOW_SDR50_HACK __BIT(4)
#define SDHC_PCI_QUIRK_INTEL_EMMC_HW_RESET __BIT(5)
#define SDHC_PCI_QUIRK_SINGLE_POWER_WRITE __BIT(6)
+#define SDHC_PCI_QUIRK_BROKEN_ADMA __BIT(7)
} sdhc_pci_quirk_table[] = {
{
PCI_VENDOR_TI,
@@ -123,6 +124,7 @@
0,
SDHC_PCI_QUIRK_RICOH_SLOW_SDR50_HACK
| SDHC_PCI_QUIRK_SINGLE_POWER_WRITE
+ | SDHC_PCI_QUIRK_BROKEN_ADMA
},
{
PCI_VENDOR_RICOH,
@@ -131,6 +133,7 @@
0xffff,
~0,
SDHC_PCI_QUIRK_FORCE_DMA
+ | SDHC_PCI_QUIRK_BROKEN_ADMA
},
{
@@ -140,6 +143,7 @@
0xffff,
~0,
SDHC_PCI_QUIRK_FORCE_DMA
+ | SDHC_PCI_QUIRK_BROKEN_ADMA
},
{
@@ -273,6 +277,8 @@
SET(sc->sc.sc_flags, SDHC_FLAG_SINGLE_POWER_WRITE);
if (ISSET(flags, SDHC_PCI_QUIRK_NO_PWR0))
SET(sc->sc.sc_flags, SDHC_FLAG_NO_PWR0);
+ if (ISSET(flags, SDHC_PCI_QUIRK_BROKEN_ADMA))
+ SET(sc->sc.sc_flags, SDHC_FLAG_BROKEN_ADMA);
if (ISSET(flags, SDHC_PCI_QUIRK_RICOH_LOWER_FREQ_HACK))
sdhc_pci_quirk_ricoh_lower_freq_hack(pa);
if (ISSET(flags, SDHC_PCI_QUIRK_RICOH_SLOW_SDR50_HACK))
diff -r 5203b725fc4e -r eb67cbd622ae sys/dev/sdmmc/sdhc.c
--- a/sys/dev/sdmmc/sdhc.c Fri Oct 14 07:44:28 2022 +0000
+++ b/sys/dev/sdmmc/sdhc.c Fri Oct 14 07:54:49 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sdhc.c,v 1.115 2022/02/06 15:52:20 jmcneill Exp $ */
+/* $NetBSD: sdhc.c,v 1.116 2022/10/14 07:54:49 jmcneill Exp $ */
/* $OpenBSD: sdhc.c,v 1.25 2009/01/13 19:44:20 grange Exp $ */
/*
@@ -23,7 +23,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sdhc.c,v 1.115 2022/02/06 15:52:20 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sdhc.c,v 1.116 2022/10/14 07:54:49 jmcneill Exp $");
#ifdef _KERNEL_OPT
#include "opt_sdmmc.h"
@@ -415,7 +415,8 @@
ISSET(caps, SDHC_DMA_SUPPORT)))) {
SET(hp->flags, SHF_USE_DMA);
- if (ISSET(caps, SDHC_ADMA2_SUPP)) {
+ if (ISSET(caps, SDHC_ADMA2_SUPP) &&
+ !ISSET(sc->sc_flags, SDHC_FLAG_BROKEN_ADMA)) {
SET(hp->flags, SHF_MODE_DMAEN);
/*
* 64-bit mode was present in the 2.00 spec, removed
diff -r 5203b725fc4e -r eb67cbd622ae sys/dev/sdmmc/sdhcvar.h
--- a/sys/dev/sdmmc/sdhcvar.h Fri Oct 14 07:44:28 2022 +0000
+++ b/sys/dev/sdmmc/sdhcvar.h Fri Oct 14 07:54:49 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sdhcvar.h,v 1.32 2022/02/06 15:52:20 jmcneill Exp $ */
+/* $NetBSD: sdhcvar.h,v 1.33 2022/10/14 07:54:49 jmcneill Exp $ */
/* $OpenBSD: sdhcvar.h,v 1.3 2007/09/06 08:01:01 jsg Exp $ */
/*
@@ -66,6 +66,7 @@
* Can't 64K Byte data transfer
*/
#define SDHC_FLAG_NO_1_8_V 0x08000000 /* No 1.8V supply */
+#define SDHC_FLAG_BROKEN_ADMA 0x10000000 /* ADMA engine does not work */
uint32_t sc_clkbase;
int sc_clkmsk; /* Mask for SDCLK */
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