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[src/trunk]: src/sys/dev/fdt Use generic Arasan SDHCI driver for Zynq-7000.
details: https://anonhg.NetBSD.org/src/rev/f952b20a27a5
branches: trunk
changeset: 372039:f952b20a27a5
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Wed Oct 26 10:55:23 2022 +0000
description:
Use generic Arasan SDHCI driver for Zynq-7000.
diffstat:
sys/arch/arm/xilinx/files.zynq | 7 +-
sys/arch/arm/xilinx/zynq7000_clkc.c | 76 ++++++++++++++------
sys/arch/arm/xilinx/zynq7000_sdhc.c | 134 ------------------------------------
sys/dev/fdt/arasan_sdhc_fdt.c | 8 +-
4 files changed, 60 insertions(+), 165 deletions(-)
diffs (truncated from 328 to 300 lines):
diff -r 1b259090bb49 -r f952b20a27a5 sys/arch/arm/xilinx/files.zynq
--- a/sys/arch/arm/xilinx/files.zynq Wed Oct 26 10:38:48 2022 +0000
+++ b/sys/arch/arm/xilinx/files.zynq Wed Oct 26 10:55:23 2022 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: files.zynq,v 1.2 2022/10/25 22:27:49 jmcneill Exp $
+# $NetBSD: files.zynq,v 1.3 2022/10/26 10:55:23 jmcneill Exp $
#
# Configuration info for Xilinx Zynq-7000 SoC
#
@@ -37,8 +37,3 @@
attach ehci at fdt with zynqusb
file arch/arm/xilinx/zynq_usb.c zynqusb
file arch/arm/xilinx/zynq7000_usb.c zynqusb
-
-# SD host controller for SD/MMC
-attach sdhc at fdt with sdhc_fdt
-file arch/arm/xilinx/zynq7000_sdhc.c sdhc_fdt
-
diff -r 1b259090bb49 -r f952b20a27a5 sys/arch/arm/xilinx/zynq7000_clkc.c
--- a/sys/arch/arm/xilinx/zynq7000_clkc.c Wed Oct 26 10:38:48 2022 +0000
+++ b/sys/arch/arm/xilinx/zynq7000_clkc.c Wed Oct 26 10:55:23 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: zynq7000_clkc.c,v 1.1 2022/10/25 22:27:49 jmcneill Exp $ */
+/* $NetBSD: zynq7000_clkc.c,v 1.2 2022/10/26 10:55:23 jmcneill Exp $ */
/*-
* Copyright (c) 2022 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -28,7 +28,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: zynq7000_clkc.c,v 1.1 2022/10/25 22:27:49 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: zynq7000_clkc.c,v 1.2 2022/10/26 10:55:23 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -55,11 +55,14 @@
#define APER_CLK_CTRL 0x02c
#define UART1_CPU_1XCLKACT __BIT(21)
#define UART0_CPU_1XCLKACT __BIT(20)
+#define SDI1_CPU_1XCLKACT __BIT(11)
+#define SDI0_CPU_1XCLKACT __BIT(10)
+#define SDIO_CLK_CTRL 0x050
#define UART_CLK_CTRL 0x054
-#define UART_CLK_CTRL_DIVISOR __BITS(13,8)
-#define UART_CLK_CTRL_SRCSEL __BITS(5,4)
-#define UART_CLK_CTRL_CLKACT1 __BIT(1)
-#define UART_CLK_CTRL_CLKACT0 __BIT(0)
+#define CLK_CTRL_DIVISOR __BITS(13,8)
+#define CLK_CTRL_SRCSEL __BITS(5,4)
+#define CLK_CTRL_CLKACT1 __BIT(1)
+#define CLK_CTRL_CLKACT0 __BIT(0)
#define CLK_621_TRUE 0x0C4
#define CLK_621_TRUE_EN __BIT(0)
@@ -119,6 +122,8 @@
static int zynq7000_clkc_match(device_t, cfdata_t, void *);
static void zynq7000_clkc_attach(device_t, device_t, void *);
+static u_int zynq7000_clkc_clk_get_rate(void *, struct clk *);
+
static const struct device_compatible_entry compat_data[] = {
{ .compat = "xlnx,ps7-clkc" },
DEVICE_COMPAT_EOL
@@ -170,11 +175,34 @@
}
static u_int
+zynq7000_clkc_get_rate_iop(struct zynq7000_clkc_softc *sc,
+ bus_addr_t reg)
+{
+ uint32_t val;
+ u_int prate, sel;
+
+ val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, reg);
+ sel = __SHIFTOUT(val, CLK_CTRL_SRCSEL);
+ if (sel == 2) {
+ prate = zynq7000_clkc_clk_get_rate(sc,
+ &sc->sc_clk[clkid_armpll]);
+ } else if (sel == 3) {
+ prate = zynq7000_clkc_clk_get_rate(sc,
+ &sc->sc_clk[clkid_ddrpll]);
+ } else {
+ prate = zynq7000_clkc_clk_get_rate(sc,
+ &sc->sc_clk[clkid_iopll]);
+ }
+
+ return prate / __SHIFTOUT(val, CLK_CTRL_DIVISOR);
+}
+
+static u_int
zynq7000_clkc_clk_get_rate(void *priv, struct clk *clk)
{
struct zynq7000_clkc_softc * const sc = priv;
uint32_t val;
- u_int prate, sel;
+ u_int prate;
if (clk == &sc->sc_clk[clkid_armpll]) {
return zynq7000_clkc_get_rate_pll(sc, ARM_PLL_CTRL);
@@ -204,22 +232,12 @@
val = bus_space_read_4(sc->sc_bst, sc->sc_bsh,
ARM_CLK_CTRL);
return prate / __SHIFTOUT(val, ARM_CLK_CTRL_DIVISOR);
+ } else if (clk == &sc->sc_clk[clkid_sdio0] ||
+ clk == &sc->sc_clk[clkid_sdio1]) {
+ return zynq7000_clkc_get_rate_iop(sc, SDIO_CLK_CTRL);
} else if (clk == &sc->sc_clk[clkid_uart0] ||
clk == &sc->sc_clk[clkid_uart1]) {
- val = bus_space_read_4(sc->sc_bst, sc->sc_bsh,
- UART_CLK_CTRL);
- sel = __SHIFTOUT(val, UART_CLK_CTRL_SRCSEL);
- if (sel == 2) {
- prate = zynq7000_clkc_clk_get_rate(sc,
- &sc->sc_clk[clkid_armpll]);
- } else if (sel == 3) {
- prate = zynq7000_clkc_clk_get_rate(sc,
- &sc->sc_clk[clkid_ddrpll]);
- } else {
- prate = zynq7000_clkc_clk_get_rate(sc,
- &sc->sc_clk[clkid_iopll]);
- }
- return prate / __SHIFTOUT(val, UART_CLK_CTRL_DIVISOR);
+ return zynq7000_clkc_get_rate_iop(sc, UART_CLK_CTRL);
} else if (clk == &sc->sc_clk[clkid_uart0_aper] ||
clk == &sc->sc_clk[clkid_uart1_aper]) {
return zynq7000_clkc_clk_get_rate(sc,
@@ -249,12 +267,24 @@
} else if (clk == &sc->sc_clk[clkid_cpu_6or4x]) {
reg = ARM_CLK_CTRL;
mask = ARM_CLK_CTRL_CPU_6OR4XCLKACT;
+ } else if (clk == &sc->sc_clk[clkid_sdio0]) {
+ reg = SDIO_CLK_CTRL;
+ mask = CLK_CTRL_CLKACT0;
+ } else if (clk == &sc->sc_clk[clkid_sdio1]) {
+ reg = SDIO_CLK_CTRL;
+ mask = CLK_CTRL_CLKACT1;
} else if (clk == &sc->sc_clk[clkid_uart0]) {
reg = UART_CLK_CTRL;
- mask = UART_CLK_CTRL_CLKACT0;
+ mask = CLK_CTRL_CLKACT0;
} else if (clk == &sc->sc_clk[clkid_uart1]) {
reg = UART_CLK_CTRL;
- mask = UART_CLK_CTRL_CLKACT1;
+ mask = CLK_CTRL_CLKACT1;
+ } else if (clk == &sc->sc_clk[clkid_sdio0_aper]) {
+ reg = APER_CLK_CTRL;
+ mask = SDI0_CPU_1XCLKACT;
+ } else if (clk == &sc->sc_clk[clkid_sdio1_aper]) {
+ reg = APER_CLK_CTRL;
+ mask = SDI1_CPU_1XCLKACT;
} else if (clk == &sc->sc_clk[clkid_uart0_aper]) {
reg = APER_CLK_CTRL;
mask = UART0_CPU_1XCLKACT;
diff -r 1b259090bb49 -r f952b20a27a5 sys/arch/arm/xilinx/zynq7000_sdhc.c
--- a/sys/arch/arm/xilinx/zynq7000_sdhc.c Wed Oct 26 10:38:48 2022 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,134 +0,0 @@
-/* $NetBSD: zynq7000_sdhc.c,v 1.2 2021/01/27 03:10:20 thorpej Exp $ */
-
-/*-
- * Copyright (c) 2015 Genetec Corporation. All rights reserved.
- * Written by Hashimoto Kenichi for Genetec Corporation.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: zynq7000_sdhc.c,v 1.2 2021/01/27 03:10:20 thorpej Exp $");
-
-#include <sys/param.h>
-#include <sys/bus.h>
-#include <sys/device.h>
-#include <sys/pmf.h>
-#include <sys/systm.h>
-
-#include <machine/intr.h>
-
-#include <dev/sdmmc/sdhcvar.h>
-#include <dev/sdmmc/sdmmcvar.h>
-
-#include <dev/fdt/fdtvar.h>
-
-/* Clock */
-#define ZYNQ7000_PS_CLK (33333333) /* 33.333 MHz */
-
-struct sdhc_fdt_softc {
- struct sdhc_softc sc_sdhc;
- /* we have only one slot */
- struct sdhc_host *sc_hosts[1];
-
- void *sc_ih;
-};
-
-static int sdhc_match(device_t, cfdata_t, void *);
-static void sdhc_attach(device_t, device_t, void *);
-
-CFATTACH_DECL_NEW(sdhc_fdt, sizeof(struct sdhc_fdt_softc),
- sdhc_match, sdhc_attach, NULL, NULL);
-
-
-static const struct device_compatible_entry compat_data[] = {
- { .compat = "arasan,sdhci-8.9a" },
- DEVICE_COMPAT_EOL
-};
-
-static int
-sdhc_match(device_t parent, cfdata_t cf, void *aux)
-{
-
- struct fdt_attach_args * const faa = aux;
-
- return of_compatible_match(faa->faa_phandle, compat_data);
-}
-
-static void
-sdhc_attach(device_t parent, device_t self, void *aux)
-{
- struct sdhc_fdt_softc *sc = device_private(self);
- struct fdt_attach_args * faa = aux;
- const int phandle = faa->faa_phandle;
- char intrstr[128];
- bus_addr_t addr;
- bus_size_t size;
- bus_space_handle_t ioh;
-
- if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
- aprint_error(": couldn't get registers\n");
- return;
- }
-
- if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
- aprint_error(": failed to decode interrupt\n");
- return;
- }
-
- sc->sc_sdhc.sc_dev = self;
-
- sc->sc_sdhc.sc_dmat = faa->faa_dmat;
-
- if (bus_space_map(faa->faa_bst, addr, size, 0, &ioh)) {
- aprint_error_dev(self, "can't map\n");
- return;
- }
-
- aprint_normal(": SD/MMC host controller\n");
- aprint_naive("\n");
-
- sc->sc_sdhc.sc_host = sc->sc_hosts;
- /* base clock frequency in kHz */
- sc->sc_sdhc.sc_clkbase = ZYNQ7000_PS_CLK / 1000;
- sc->sc_sdhc.sc_flags |= SDHC_FLAG_32BIT_ACCESS;
-
- sc->sc_ih = fdtbus_intr_establish(phandle, 0, IPL_SDMMC, IST_LEVEL,
- sdhc_intr, &sc->sc_sdhc);
- if (sc->sc_ih == NULL) {
- aprint_error_dev(self, "failed to establish interrupt on %s\n",
- intrstr);
- return;
- }
- aprint_normal_dev(self, "interrupting on %s\n", intrstr);
-
- if (sdhc_host_found(&sc->sc_sdhc, faa->faa_bst, ioh, size)) {
- aprint_error_dev(self, "can't initialize host\n");
- return;
- }
-
- if (!pmf_device_register1(self, sdhc_suspend, sdhc_resume,
- sdhc_shutdown)) {
- aprint_error_dev(self,
- "can't establish power hook\n");
- }
-}
diff -r 1b259090bb49 -r f952b20a27a5 sys/dev/fdt/arasan_sdhc_fdt.c
--- a/sys/dev/fdt/arasan_sdhc_fdt.c Wed Oct 26 10:38:48 2022 +0000
+++ b/sys/dev/fdt/arasan_sdhc_fdt.c Wed Oct 26 10:55:23 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: arasan_sdhc_fdt.c,v 1.9 2022/02/06 15:52:20 jmcneill Exp $ */
+/* $NetBSD: arasan_sdhc_fdt.c,v 1.10 2022/10/26 10:55:23 jmcneill Exp $ */
/*-
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