[src/trunk]: src/sys/arch/amd64/include sys/arch/amd64: remove trailing white...

[rillig <rillig%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/1e24cdebd32a
branches:  trunk
changeset: 378583:1e24cdebd32a
user:      rillig <rillig%NetBSD.org@localhost>
date:      Sat Apr 17 20:12:55 2021 +0000

description:
sys/arch/amd64: remove trailing whitespace

diffstat:

 sys/arch/amd64/include/asm.h        |   6 +++---
 sys/arch/amd64/include/byte_swap.h  |   4 ++--
 sys/arch/amd64/include/cpu.h        |   4 ++--
 sys/arch/amd64/include/db_machdep.h |  14 +++++++-------
 sys/arch/amd64/include/frame_regs.h |   4 ++--
 sys/arch/amd64/include/frameasm.h   |   4 ++--
 sys/arch/amd64/include/i82093reg.h  |   4 ++--
 sys/arch/amd64/include/int_limits.h |   4 ++--
 sys/arch/amd64/include/profile.h    |   4 ++--
 sys/arch/amd64/include/segments.h   |   4 ++--
 10 files changed, 26 insertions(+), 26 deletions(-)

diffs (206 lines):

diff -r 94166bfd6eb8 -r 1e24cdebd32a sys/arch/amd64/include/asm.h
--- a/sys/arch/amd64/include/asm.h      Sat Apr 17 19:42:01 2021 +0000
+++ b/sys/arch/amd64/include/asm.h      Sat Apr 17 20:12:55 2021 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: asm.h,v 1.21 2020/04/25 15:26:16 bouyer Exp $  */
+/*     $NetBSD: asm.h,v 1.22 2021/04/17 20:12:55 rillig Exp $  */
 
 /*-
  * Copyright (c) 1990 The Regents of the University of California.
@@ -81,12 +81,12 @@
        ALIGN_TEXT; .globl X ## name; .type X ## name,@function; X ## name:
 #define        IDTVEC_END(name) \
        .size X ## name, . - X ## name
-#else 
+#else
 #define        IDTVEC(name) \
        ALIGN_TEXT; .globl X/**/name; .type X/**/name,@function; X/**/name:
 #define        IDTVEC_END(name) \
        .size X/**/name, . - X/**/name
-#endif /* __STDC__ */ 
+#endif /* __STDC__ */
 #endif /* _KERNEL */
 
 #ifdef __STDC__
diff -r 94166bfd6eb8 -r 1e24cdebd32a sys/arch/amd64/include/byte_swap.h
--- a/sys/arch/amd64/include/byte_swap.h        Sat Apr 17 19:42:01 2021 +0000
+++ b/sys/arch/amd64/include/byte_swap.h        Sat Apr 17 20:12:55 2021 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: byte_swap.h,v 1.7 2010/01/14 02:06:04 joerg Exp $      */
+/*     $NetBSD: byte_swap.h,v 1.8 2021/04/17 20:12:55 rillig Exp $     */
 
 /*-
  * Copyright (c) 1998, 2010 The NetBSD Foundation, Inc.
@@ -65,7 +65,7 @@ static __inline uint16_t __byte_swap_u16
 static __inline uint16_t
 __byte_swap_u16_variable(uint16_t x)
 {
-       __asm volatile ("rorw $8, %w1" : "=r" (x) : "0" (x)); 
+       __asm volatile ("rorw $8, %w1" : "=r" (x) : "0" (x));
        return (x);
 }
 
diff -r 94166bfd6eb8 -r 1e24cdebd32a sys/arch/amd64/include/cpu.h
--- a/sys/arch/amd64/include/cpu.h      Sat Apr 17 19:42:01 2021 +0000
+++ b/sys/arch/amd64/include/cpu.h      Sat Apr 17 20:12:55 2021 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpu.h,v 1.68 2020/03/17 17:18:49 maxv Exp $    */
+/*     $NetBSD: cpu.h,v 1.69 2021/04/17 20:12:55 rillig Exp $  */
 
 /*-
  * Copyright (c) 1990 The Regents of the University of California.
@@ -84,7 +84,7 @@ x86_curlwp(void)
 #define CLKF_INTR(frame)       (curcpu()->ci_idepth > 0)
 #define LWP_PC(l)              ((l)->l_md.md_regs->tf_rip)
 
-void *cpu_uarea_alloc(bool);           
+void *cpu_uarea_alloc(bool);
 bool cpu_uarea_free(void *);
 
 #endif /* _KERNEL */
diff -r 94166bfd6eb8 -r 1e24cdebd32a sys/arch/amd64/include/db_machdep.h
--- a/sys/arch/amd64/include/db_machdep.h       Sat Apr 17 19:42:01 2021 +0000
+++ b/sys/arch/amd64/include/db_machdep.h       Sat Apr 17 20:12:55 2021 +0000
@@ -1,27 +1,27 @@
-/*     $NetBSD: db_machdep.h,v 1.16 2017/11/06 03:47:45 christos Exp $ */
+/*     $NetBSD: db_machdep.h,v 1.17 2021/04/17 20:12:55 rillig Exp $   */
 
-/* 
+/*
  * Mach Operating System
  * Copyright (c) 1991,1990 Carnegie Mellon University
  * All Rights Reserved.
- * 
+ *
  * Permission to use, copy, modify and distribute this software and its
  * documentation is hereby granted, provided that both the copyright
  * notice and this permission notice appear in all copies of the
  * software, derivative works or modified versions, and any portions
  * thereof, and that both notices appear in supporting documentation.
- * 
+ *
  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
  * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- * 
+ *
  * Carnegie Mellon requests users of this software to return to
- * 
+ *
  *  Software Distribution Coordinator  or  Software.Distribution%CS.CMU.EDU@localhost
  *  School of Computer Science
  *  Carnegie Mellon University
  *  Pittsburgh PA 15213-3890
- * 
+ *
  * any improvements or extensions that they make and grant Carnegie Mellon
  * the rights to redistribute these changes.
  */
diff -r 94166bfd6eb8 -r 1e24cdebd32a sys/arch/amd64/include/frame_regs.h
--- a/sys/arch/amd64/include/frame_regs.h       Sat Apr 17 19:42:01 2021 +0000
+++ b/sys/arch/amd64/include/frame_regs.h       Sat Apr 17 20:12:55 2021 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: frame_regs.h,v 1.7 2015/04/26 18:49:39 mrg Exp $       */
+/*     $NetBSD: frame_regs.h,v 1.8 2021/04/17 20:12:55 rillig Exp $    */
 
 #ifndef _AMD64_FRAME_REGS_H_
 #define _AMD64_FRAME_REGS_H_
@@ -11,7 +11,7 @@
  * has been changed to improve syscall efficiency.
  *
  * Notes:
- * 1) gdb (amd64nbsd-tdep.c) has a lookup table that assumes the __greg_t 
+ * 1) gdb (amd64nbsd-tdep.c) has a lookup table that assumes the __greg_t
  *    ordering.
  * 2) src/lib/libc/arch/x86_64/gen/makecontext.c assumes that the first
  *    6 entries in the __greg_t array match the registers used to pass
diff -r 94166bfd6eb8 -r 1e24cdebd32a sys/arch/amd64/include/frameasm.h
--- a/sys/arch/amd64/include/frameasm.h Sat Apr 17 19:42:01 2021 +0000
+++ b/sys/arch/amd64/include/frameasm.h Sat Apr 17 20:12:55 2021 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: frameasm.h,v 1.52 2020/07/19 07:35:08 maxv Exp $       */
+/*     $NetBSD: frameasm.h,v 1.53 2021/04/17 20:12:55 rillig Exp $     */
 
 #ifndef _AMD64_MACHINE_FRAMEASM_H
 #define _AMD64_MACHINE_FRAMEASM_H
@@ -39,7 +39,7 @@
 #define POPF \
        popq %rdi; \
        call _C_LABEL(xen_write_psl)
-       
+
 
 #else /* XENPV */
 #define        XEN_ONLY2(x,y)
diff -r 94166bfd6eb8 -r 1e24cdebd32a sys/arch/amd64/include/i82093reg.h
--- a/sys/arch/amd64/include/i82093reg.h        Sat Apr 17 19:42:01 2021 +0000
+++ b/sys/arch/amd64/include/i82093reg.h        Sat Apr 17 20:12:55 2021 +0000
@@ -1,4 +1,4 @@
-/*      $NetBSD: i82093reg.h,v 1.9 2017/11/13 11:45:54 nakayama Exp $ */
+/*      $NetBSD: i82093reg.h,v 1.10 2021/04/17 20:12:55 rillig Exp $ */
 
 #include <x86/i82093reg.h>
 
@@ -37,7 +37,7 @@ 78:
 
 #define ioapic_asm_unlock(num) \
        movb    $0,PIC_LOCK(%rdi)
-       
+
 #else
 
 #define ioapic_asm_lock(num)
diff -r 94166bfd6eb8 -r 1e24cdebd32a sys/arch/amd64/include/int_limits.h
--- a/sys/arch/amd64/include/int_limits.h       Sat Apr 17 19:42:01 2021 +0000
+++ b/sys/arch/amd64/include/int_limits.h       Sat Apr 17 20:12:55 2021 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: int_limits.h,v 1.9 2014/07/25 21:43:13 joerg Exp $     */
+/*     $NetBSD: int_limits.h,v 1.10 2021/04/17 20:12:55 rillig Exp $   */
 
 /*-
  * Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -83,7 +83,7 @@
 #define        UINT_LEAST64_MAX 0xffffffffffffffffUL           /* uint_least64_t */
 
 /* 7.18.2.3 Limits of fastest minimum-width integer types */
- 
+
 /* minimum values of fastest minimum-width signed integer types */
 #define        INT_FAST8_MIN   (-0x7fffffff-1)                 /* int_fast8_t    */
 #define        INT_FAST16_MIN  (-0x7fffffff-1)                 /* int_fast16_t   */
diff -r 94166bfd6eb8 -r 1e24cdebd32a sys/arch/amd64/include/profile.h
--- a/sys/arch/amd64/include/profile.h  Sat Apr 17 19:42:01 2021 +0000
+++ b/sys/arch/amd64/include/profile.h  Sat Apr 17 20:12:55 2021 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: profile.h,v 1.19 2019/02/11 14:59:32 cherry Exp $      */
+/*     $NetBSD: profile.h,v 1.20 2021/04/17 20:12:55 rillig Exp $      */
 
 /*
  * Copyright (c) 1992, 1993
@@ -100,7 +100,7 @@ mcount_write_psl(u_long psl)
        curcpu()->ci_vcpu->evtchn_upcall_mask = psl;
        /* can't call x86_lfence because it calls mcount() */
        __asm volatile("lfence" ::: "memory"); /* x86_lfence() */
-       /* XXX can't call hypervisor_force_callback() because we're in mcount*/ 
+       /* XXX can't call hypervisor_force_callback() because we're in mcount*/
 }
 
 #else /* XENPV */
diff -r 94166bfd6eb8 -r 1e24cdebd32a sys/arch/amd64/include/segments.h
--- a/sys/arch/amd64/include/segments.h Sat Apr 17 19:42:01 2021 +0000
+++ b/sys/arch/amd64/include/segments.h Sat Apr 17 20:12:55 2021 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: segments.h,v 1.37 2020/07/14 00:45:52 yamaguchi Exp $  */
+/*     $NetBSD: segments.h,v 1.38 2021/04/17 20:12:55 rillig Exp $     */
 
 /*
  * Copyright (c) 1990 The Regents of the University of California.
@@ -236,7 +236,7 @@ struct region_descriptor {
 #ifdef XENPV
 typedef struct trap_info idt_descriptor_t;
 #else
-typedef struct gate_descriptor idt_descriptor_t; 
+typedef struct gate_descriptor idt_descriptor_t;
 #endif /* XENPV */
 extern char *gdtstore;
 extern char *ldtstore;