[src/trunk]: src/sys/arch/arm arm/sunxi: Wire up sun8icrypto(4) on Allwinner H5.

[riastradh <riastradh%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/f4c78d230532
branches:  trunk
changeset: 378712:f4c78d230532
user:      riastradh <riastradh%NetBSD.org@localhost>
date:      Sat Apr 24 13:01:35 2021 +0000

description:
arm/sunxi: Wire up sun8icrypto(4) on Allwinner H5.

Tested on NanoPi Neo PLUS2.

diffstat:

 sys/arch/arm/dts/sun50i-h5.dtsi   |  15 ++++++++++++++-
 sys/arch/arm/sunxi/sun8i_crypto.c |   5 +++--
 sys/arch/arm/sunxi/sun8i_h3_ccu.c |  16 ++++++++++++++--
 3 files changed, 31 insertions(+), 5 deletions(-)

diffs (113 lines):

diff -r 35d806de64bd -r f4c78d230532 sys/arch/arm/dts/sun50i-h5.dtsi
--- a/sys/arch/arm/dts/sun50i-h5.dtsi   Sat Apr 24 09:42:00 2021 +0000
+++ b/sys/arch/arm/dts/sun50i-h5.dtsi   Sat Apr 24 13:01:35 2021 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sun50i-h5.dtsi,v 1.1 2018/01/28 18:31:15 jmcneill Exp $ */
+/* $NetBSD: sun50i-h5.dtsi,v 1.2 2021/04/24 13:01:35 riastradh Exp $ */
 
 /*-
  * Copyright (c) 2018 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -28,6 +28,19 @@
 
 #include "sun8i-h3.dtsi"
 
+/ {
+       soc {
+               crypto: crypto@1c15000 {
+                       compatible = "allwinner,sun50i-h5-crypto";
+                       reg = <0x01c15000 0x1000>;
+                       interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
+                       clock-names = "bus", "mod";
+                       resets = <&ccu RST_BUS_CE>;
+               };
+       };
+};
+
 &rtp {
        compatible = "allwinner,sun50i-h5-ts";
 };
diff -r 35d806de64bd -r f4c78d230532 sys/arch/arm/sunxi/sun8i_crypto.c
--- a/sys/arch/arm/sunxi/sun8i_crypto.c Sat Apr 24 09:42:00 2021 +0000
+++ b/sys/arch/arm/sunxi/sun8i_crypto.c Sat Apr 24 13:01:35 2021 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: sun8i_crypto.c,v 1.23 2021/01/27 03:10:20 thorpej Exp $        */
+/*     $NetBSD: sun8i_crypto.c,v 1.24 2021/04/24 13:01:35 riastradh Exp $      */
 
 /*-
  * Copyright (c) 2019 The NetBSD Foundation, Inc.
@@ -43,7 +43,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: sun8i_crypto.c,v 1.23 2021/01/27 03:10:20 thorpej Exp $");
+__KERNEL_RCSID(1, "$NetBSD: sun8i_crypto.c,v 1.24 2021/04/24 13:01:35 riastradh Exp $");
 
 #include <sys/types.h>
 #include <sys/param.h>
@@ -320,6 +320,7 @@ CFATTACH_DECL_NEW(sun8i_crypto, sizeof(s
 
 static const struct device_compatible_entry compat_data[] = {
        { .compat = "allwinner,sun50i-a64-crypto" },
+       { .compat = "allwinner,sun50i-h5-crypto" },
        DEVICE_COMPAT_EOL
 };
 
diff -r 35d806de64bd -r f4c78d230532 sys/arch/arm/sunxi/sun8i_h3_ccu.c
--- a/sys/arch/arm/sunxi/sun8i_h3_ccu.c Sat Apr 24 09:42:00 2021 +0000
+++ b/sys/arch/arm/sunxi/sun8i_h3_ccu.c Sat Apr 24 13:01:35 2021 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sun8i_h3_ccu.c,v 1.17 2021/01/27 03:10:20 thorpej Exp $ */
+/* $NetBSD: sun8i_h3_ccu.c,v 1.18 2021/04/24 13:01:35 riastradh Exp $ */
 
 /*-
  * Copyright (c) 2017 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -29,7 +29,7 @@
 
 #include <sys/cdefs.h>
 
-__KERNEL_RCSID(1, "$NetBSD: sun8i_h3_ccu.c,v 1.17 2021/01/27 03:10:20 thorpej Exp $");
+__KERNEL_RCSID(1, "$NetBSD: sun8i_h3_ccu.c,v 1.18 2021/04/24 13:01:35 riastradh Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -60,6 +60,7 @@
 #define        SDMMC0_CLK_REG          0x088
 #define        SDMMC1_CLK_REG          0x08c
 #define        SDMMC2_CLK_REG          0x090
+#define        CE_CLK_REG              0x09c
 #define        SPI0_CLK_REG            0x0a0
 #define        SPI1_CLK_REG            0x0a4
 #define        USBPHY_CFG_REG          0x0cc
@@ -154,6 +155,7 @@ static const char *ahb1_parents[] = { "l
 static const char *ahb2_parents[] = { "ahb1", "pll_periph0" };
 static const char *apb1_parents[] = { "ahb1" };
 static const char *apb2_parents[] = { "losc", "hosc", "pll_periph0" };
+static const char *ce_parents[] = { "hosc", "pll_periph0_2x", "pll_periph1_2x" };
 static const char *mod_parents[] = { "hosc", "pll_periph0", "pll_periph1" };
 static const char *ths_parents[] = { "hosc" };
 static const char *de_parents[] = { "pll_periph0_2x", "pll_de" };
@@ -329,6 +331,14 @@ static struct sunxi_ccu_clk sun8i_h3_ccu
            0,                  /* enable */
            SUNXI_CCU_NM_POWER_OF_TWO),
 
+       SUNXI_CCU_NM(H3_CLK_CE, "ce", ce_parents,
+           CE_CLK_REG,         /* reg */
+           __BITS(17,16),      /* n */
+           __BITS(3,0),        /* m */
+           __BITS(25,24),      /* sel */
+           __BIT(31),          /* enable */
+           SUNXI_CCU_NM_POWER_OF_TWO|SUNXI_CCU_NM_ROUND_DOWN),
+
        SUNXI_CCU_DIV_GATE(H3_CLK_THS, "ths", ths_parents,
            THS_CLK_REG,        /* reg */
            __BITS(1,0),        /* div */
@@ -400,6 +410,8 @@ static struct sunxi_ccu_clk sun8i_h3_ccu
            __BIT(31),          /* enable */
            0),
 
+       SUNXI_CCU_GATE(H3_CLK_BUS_CE, "bus-ce", "ahb1",
+           BUS_CLK_GATING_REG0, 5),
        SUNXI_CCU_GATE(H3_CLK_BUS_DMA, "bus-dma", "ahb1",
            BUS_CLK_GATING_REG0, 6),
        SUNXI_CCU_GATE(H3_CLK_BUS_MMC0, "bus-mmc0", "ahb1",