[src/trunk]: src/common/lib/libc/arch/arm/atomic Add the appropriate memory b...

[skrll <skrll%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/f5eb4aea7f2d
branches:  trunk
changeset: 378872:f5eb4aea7f2d
user:      skrll <skrll%NetBSD.org@localhost>
date:      Mon Apr 26 21:40:21 2021 +0000

description:
Add the appropriate memory barrier before the lock is cleared in
__sync_lock_release_{1,2,4,8}.  That is, all reads and write for in inner
shareability domain before the lock clear store.

diffstat:

 common/lib/libc/arch/arm/atomic/atomic_swap.S    |  6 +++---
 common/lib/libc/arch/arm/atomic/atomic_swap_16.S |  7 ++++++-
 common/lib/libc/arch/arm/atomic/atomic_swap_64.S |  7 ++++++-
 3 files changed, 15 insertions(+), 5 deletions(-)

diffs (69 lines):

diff -r dc29c7768746 -r f5eb4aea7f2d common/lib/libc/arch/arm/atomic/atomic_swap.S
--- a/common/lib/libc/arch/arm/atomic/atomic_swap.S     Mon Apr 26 21:32:49 2021 +0000
+++ b/common/lib/libc/arch/arm/atomic/atomic_swap.S     Mon Apr 26 21:40:21 2021 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: atomic_swap.S,v 1.16 2021/04/24 20:34:34 skrll Exp $   */
+/*     $NetBSD: atomic_swap.S,v 1.17 2021/04/26 21:40:21 skrll Exp $   */
 
 /*-
  * Copyright (c) 2007,2012 The NetBSD Foundation, Inc.
@@ -88,7 +88,7 @@ STRONG_ALIAS(_atomic_swap_ptr,_atomic_sw
 ENTRY_NP(__sync_lock_release_4)
        mov     r1, #0
 #ifdef _ARM_ARCH_7
-       dmb
+       dmb     ishst
 #else
        mcr     p15, 0, r1, c7, c10, 5  /* data memory barrier */
 #endif
@@ -129,7 +129,7 @@ STRONG_ALIAS(_atomic_swap_uchar,_atomic_
 ENTRY_NP(__sync_lock_release_1)
        mov     r1, #0
 #ifdef _ARM_ARCH_7
-       dmb
+       dmb     ishst
 #else
        mcr     p15, 0, r1, c7, c10, 5  /* data memory barrier */
 #endif
diff -r dc29c7768746 -r f5eb4aea7f2d common/lib/libc/arch/arm/atomic/atomic_swap_16.S
--- a/common/lib/libc/arch/arm/atomic/atomic_swap_16.S  Mon Apr 26 21:32:49 2021 +0000
+++ b/common/lib/libc/arch/arm/atomic/atomic_swap_16.S  Mon Apr 26 21:40:21 2021 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: atomic_swap_16.S,v 1.4 2015/05/17 20:57:11 justin Exp $ */
+/*     $NetBSD: atomic_swap_16.S,v 1.5 2021/04/26 21:40:21 skrll Exp $ */
 
 /*-
  * Copyright (c) 2013 The NetBSD Foundation, Inc.
@@ -58,6 +58,11 @@ STRONG_ALIAS(_atomic_swap_ushort,_atomic
 #if (!defined(_KERNEL) || !defined(_RUMPKERNEL)) && !defined(_STANDALONE)
 ENTRY_NP(__sync_lock_release_2)
        mov     r1, #0
+#ifdef _ARM_ARCH_7
+       dmb     ishst
+#else
+       mcr     p15, 0, r1, c7, c10, 5  /* data memory barrier */
+#endif
        strh    r1, [r0]
        RET
 END(__sync_lock_release_2)
diff -r dc29c7768746 -r f5eb4aea7f2d common/lib/libc/arch/arm/atomic/atomic_swap_64.S
--- a/common/lib/libc/arch/arm/atomic/atomic_swap_64.S  Mon Apr 26 21:32:49 2021 +0000
+++ b/common/lib/libc/arch/arm/atomic/atomic_swap_64.S  Mon Apr 26 21:40:21 2021 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: atomic_swap_64.S,v 1.11 2021/04/24 20:34:34 skrll Exp $        */
+/*     $NetBSD: atomic_swap_64.S,v 1.12 2021/04/26 21:40:21 skrll Exp $        */
 /*-
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -57,6 +57,11 @@ CRT_ALIAS(__atomic_exchange_8,_atomic_sw
 ENTRY_NP(__sync_lock_release_8)
        mov     r2, #0
        mov     r3, #0
+#ifdef _ARM_ARCH_7
+       dmb     ishst
+#else
+       mcr     p15, 0, r2, c7, c10, 5  /* data memory barrier */
+#endif
        strd    r2, r3, [r0]
        RET
 END(__sync_lock_release_8)