[src/trunk]: src/sys/arch/riscv/include Provide riscvreg_satp_{read,write}

[skrll <skrll%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/f23c5201e369
branches:  trunk
changeset: 378955:f23c5201e369
user:      skrll <skrll%NetBSD.org@localhost>
date:      Sat May 01 07:09:55 2021 +0000

description:
Provide riscvreg_satp_{read,write}

diffstat:

 sys/arch/riscv/include/sysreg.h |  18 +++++++++++++++++-
 1 files changed, 17 insertions(+), 1 deletions(-)

diffs (39 lines):

diff -r 1a1e4577a6b1 -r f23c5201e369 sys/arch/riscv/include/sysreg.h
--- a/sys/arch/riscv/include/sysreg.h   Sat May 01 07:09:04 2021 +0000
+++ b/sys/arch/riscv/include/sysreg.h   Sat May 01 07:09:55 2021 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sysreg.h,v 1.12 2021/05/01 07:09:04 skrll Exp $ */
+/* $NetBSD: sysreg.h,v 1.13 2021/05/01 07:09:55 skrll Exp $ */
 
 /*
  * Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -36,6 +36,8 @@
 #include <sys/param.h>
 #endif
 
+#include <riscv/reg.h>
+
 #define FCSR_FMASK     0       // no exception bits
 #define FCSR_FRM       __BITS(7,5)
 #define  FCSR_FRM_RNE  0b000   // Round Nearest, ties to Even
@@ -262,6 +264,20 @@ riscvreg_cycle_read(void)
 #define SATP_PPN               __BITS(21,0)
 #endif
 
+static inline uintptr_t
+riscvreg_satp_read(void)
+{
+       uintptr_t satp;
+       __asm __volatile("csrr  %0, satp" : "=r" (satp));
+       return satp;
+}
+
+static inline void
+riscvreg_satp_write(uintptr_t satp)
+{
+       __asm __volatile("csrw  satp, %0" :: "r" (satp));
+}
+
 static inline uint32_t
 riscvreg_asid_read(void)
 {