mhitch Sat Mar 21 22:31:40 PST 1998 Update of /cvsroot/src/sys/arch/mips/mips In directory nb00:/tmp/cvs-serv25026 Modified Files: mips_machdep.c Log Message: Set the PID before setting up the wired TLB entries for proc0. The mips3_HitFlushDCache() fails with a TLB miss otherwise.