CVS commit: syssrc/sys/arch/arm26

[Ben Harris <bjh21%netbsd.org@localhost>]

Module Name:    syssrc
Committed By:   bjh21
Date:           Tue Aug 21 22:47:18 UTC 2001

Modified Files:
        syssrc/sys/arch/arm26/arm26: fiq_util.S irq.c start.c
        syssrc/sys/arch/arm26/include: intr.h

Log Message:
Two related changes:

Make splhigh disable IRQs at the CPU rather than at the IOC.  This has the
potential to be faster, and more importantly ensures that splhigh() blocks
FIQ downgrades.

Have a variable which indicates that a FIQ downgrade is required, and ensure
that the IOC "force IRQ" bit is turned on in this case.  This ensures that
FIQ downgrades don't get lost if something happens to be fiddling with the
interrupt mask at the wrong moment.


To generate a diff of this commit:
cvs rdiff -r1.1 -r1.2 syssrc/sys/arch/arm26/arm26/fiq_util.S
cvs rdiff -r1.19 -r1.20 syssrc/sys/arch/arm26/arm26/irq.c
cvs rdiff -r1.10 -r1.11 syssrc/sys/arch/arm26/arm26/start.c
cvs rdiff -r1.9 -r1.10 syssrc/sys/arch/arm26/include/intr.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.