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CVS commit: syssrc/sys/arch/evbarm



Module Name:    syssrc
Committed By:   thorpej
Date:           Wed Nov  7 00:33:26 UTC 2001

Modified Files:
        syssrc/sys/arch/evbarm/conf: IQ80310 files.iq80310 std.iq80310
        syssrc/sys/arch/evbarm/include: autoconf.h
        syssrc/sys/arch/evbarm/iq80310: com_obio.c iq80310_machdep.c
Added Files:
        syssrc/sys/arch/evbarm/iq80310: iq80310_7seg.c iq80310_intr.c
            iq80310_irq.S iq80310_timer.c iq80310reg.h iq80310var.h obio.c
            obio_space.c obio_space_asm.S obiovar.h
Removed Files:
        syssrc/sys/arch/evbarm/iq80310: iq80310map.h

Log Message:
Rework and fleshing out of Intel IQ80310 XScale eval board support.
More work to do -- this is a snapshot of work-in-progress.


To generate a diff of this commit:
cvs rdiff -r1.1 -r1.2 syssrc/sys/arch/evbarm/conf/IQ80310
cvs rdiff -r1.2 -r1.3 syssrc/sys/arch/evbarm/conf/files.iq80310
cvs rdiff -r1.5 -r1.6 syssrc/sys/arch/evbarm/conf/std.iq80310
cvs rdiff -r1.1 -r1.2 syssrc/sys/arch/evbarm/include/autoconf.h
cvs rdiff -r1.1 -r1.2 syssrc/sys/arch/evbarm/iq80310/com_obio.c \
    syssrc/sys/arch/evbarm/iq80310/iq80310_machdep.c
cvs rdiff -r0 -r1.1 syssrc/sys/arch/evbarm/iq80310/iq80310_7seg.c \
    syssrc/sys/arch/evbarm/iq80310/iq80310_intr.c \
    syssrc/sys/arch/evbarm/iq80310/iq80310_irq.S \
    syssrc/sys/arch/evbarm/iq80310/iq80310_timer.c \
    syssrc/sys/arch/evbarm/iq80310/iq80310reg.h \
    syssrc/sys/arch/evbarm/iq80310/iq80310var.h \
    syssrc/sys/arch/evbarm/iq80310/obio.c \
    syssrc/sys/arch/evbarm/iq80310/obio_space.c \
    syssrc/sys/arch/evbarm/iq80310/obio_space_asm.S \
    syssrc/sys/arch/evbarm/iq80310/obiovar.h
cvs rdiff -r1.1 -r0 syssrc/sys/arch/evbarm/iq80310/iq80310map.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.




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