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CVS commit: syssrc/sys/arch/prep/pci
Module Name: syssrc
Committed By: kleink
Date: Wed Dec 12 10:18:49 UTC 2001
Modified Files:
syssrc/sys/arch/prep/pci: pchb.c
Log Message:
The MPC105 does not implement the IBM reference implementation's
Equipment Present Register (I/O port 0x080c), so perform L2 cache
detection here.
To generate a diff of this commit:
cvs rdiff -r1.1 -r1.2 syssrc/sys/arch/prep/pci/pchb.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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