CVS commit: syssrc/sys/arch

[Jason R Thorpe <thorpej%netbsd.org@localhost>]

Module Name:    syssrc
Committed By:   thorpej
Date:           Fri Jan 25 19:19:30 UTC 2002

Modified Files:
        syssrc/sys/arch/acorn32/acorn32: rpc_machdep.c
        syssrc/sys/arch/acorn32/podulebus: esc.c sfas.c
        syssrc/sys/arch/arm/arm: cpufunc.c fiq.c sig_machdep.c
        syssrc/sys/arch/arm/arm32: bus_dma.c cpuswitch.S db_interface.c
            genassym.cf locore.S pmap.c sys_machdep.c vm_machdep.c
        syssrc/sys/arch/arm/include: cpufunc.h
        syssrc/sys/arch/arm/iomd: iomd_dma.c
        syssrc/sys/arch/arm32/ofw: ofw.c ofwgencfg_machdep.c
        syssrc/sys/arch/arm32/shark: shark_machdep.c
        syssrc/sys/arch/cats/cats: cats_machdep.c
        syssrc/sys/arch/dnard/dnard: dnard_machdep.c
        syssrc/sys/arch/dnard/ofw: ofw.c
        syssrc/sys/arch/evbarm/integrator: int_bus_dma.c integrator_machdep.c
        syssrc/sys/arch/evbarm/iq80310: iq80310_machdep.c
        syssrc/sys/arch/hpcarm/hpcarm: cpuswitch.S locore.S
        syssrc/sys/arch/netwinder/netwinder: netwinder_machdep.c

Log Message:
Overhaul of the ARM cache code.  This is mostly a simplification
pass.  Rather than providing a whole slew of cache operations that
aren't ever used, distill them down to some useful primitives:

        icache_sync_all         Synchronize I-cache
        icache_sync_range       Synchronize I-cache range

        dcache_wbinv_all        Write-back and Invalidate D-cache
        dcache_wbinv_range      Write-back and Invalidate D-cache range
        dcache_inv_range        Invalidate D-cache range
        dcache_wb_range         Write-back D-cache range

        idcache_wbinv_all       Write-back and Invalidate D-cache,
                                Invalidate I-cache
        idcache_wbinv_range     Write-back and Invalidate D-cache,
                                Invalidate I-cache range

Note: This does not yet include an overhaul of the actual asm files
that implement the primitives.  Instead, we've provided a safe default
for each CPU type, and the individual CPU types can now be optimized
one at a time.


To generate a diff of this commit:
cvs rdiff -r1.9 -r1.10 syssrc/sys/arch/acorn32/acorn32/rpc_machdep.c
cvs rdiff -r1.3 -r1.4 syssrc/sys/arch/acorn32/podulebus/esc.c \
    syssrc/sys/arch/acorn32/podulebus/sfas.c
cvs rdiff -r1.26 -r1.27 syssrc/sys/arch/arm/arm/cpufunc.c
cvs rdiff -r1.2 -r1.3 syssrc/sys/arch/arm/arm/fiq.c
cvs rdiff -r1.9 -r1.10 syssrc/sys/arch/arm/arm/sig_machdep.c
cvs rdiff -r1.5 -r1.6 syssrc/sys/arch/arm/arm32/bus_dma.c \
    syssrc/sys/arch/arm/arm32/cpuswitch.S
cvs rdiff -r1.16 -r1.17 syssrc/sys/arch/arm/arm32/db_interface.c
cvs rdiff -r1.8 -r1.9 syssrc/sys/arch/arm/arm32/genassym.cf
cvs rdiff -r1.2 -r1.3 syssrc/sys/arch/arm/arm32/locore.S \
    syssrc/sys/arch/arm/arm32/sys_machdep.c
cvs rdiff -r1.35 -r1.36 syssrc/sys/arch/arm/arm32/pmap.c
cvs rdiff -r1.11 -r1.12 syssrc/sys/arch/arm/arm32/vm_machdep.c
cvs rdiff -r1.16 -r1.17 syssrc/sys/arch/arm/include/cpufunc.h
cvs rdiff -r1.2 -r1.3 syssrc/sys/arch/arm/iomd/iomd_dma.c
cvs rdiff -r1.29 -r1.30 syssrc/sys/arch/arm32/ofw/ofw.c
cvs rdiff -r1.20 -r1.21 syssrc/sys/arch/arm32/ofw/ofwgencfg_machdep.c
cvs rdiff -r1.29 -r1.30 syssrc/sys/arch/arm32/shark/shark_machdep.c
cvs rdiff -r1.11 -r1.12 syssrc/sys/arch/cats/cats/cats_machdep.c
cvs rdiff -r1.8 -r1.9 syssrc/sys/arch/dnard/dnard/dnard_machdep.c
cvs rdiff -r1.4 -r1.5 syssrc/sys/arch/dnard/ofw/ofw.c
cvs rdiff -r1.3 -r1.4 syssrc/sys/arch/evbarm/integrator/int_bus_dma.c
cvs rdiff -r1.6 -r1.7 syssrc/sys/arch/evbarm/integrator/integrator_machdep.c
cvs rdiff -r1.16 -r1.17 syssrc/sys/arch/evbarm/iq80310/iq80310_machdep.c
cvs rdiff -r1.2 -r1.3 syssrc/sys/arch/hpcarm/hpcarm/cpuswitch.S
cvs rdiff -r1.4 -r1.5 syssrc/sys/arch/hpcarm/hpcarm/locore.S
cvs rdiff -r1.14 -r1.15 \
    syssrc/sys/arch/netwinder/netwinder/netwinder_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.