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CVS commit: syssrc/sys/arch
Module Name: syssrc
Committed By: thorpej
Date: Fri Jan 25 20:57:44 UTC 2002
Modified Files:
syssrc/sys/arch/arm/arm32: bus_dma.c
syssrc/sys/arch/arm/include: bus.h
syssrc/sys/arch/arm/xscale: i80312_pci_dma.c
syssrc/sys/arch/evbarm/integrator: int_bus_dma.c
Log Message:
Overhaul bus_dmamap_sync for the ARM:
* Track which process (XXX really, vmspace) owns the mapping. When
we sync the map, if the mapping doesn't belong to the kernel or to
the current process (XXX really, vmspace), then no cache fobbing
is necessary, since the cache is Wb-Inv'd on context switch (XXX need
to revisit this when we support FCSE).
* Be smarter about which cache operation we do when sync'ing the map:
- PREREAD -- Invalidate D$ (XXX right now, we actually do Wb-Inv)
- PREWRITE -- Write-back D$ (note, we do NOT invalidate here)
- PREREAD|PREWRITE -- Wb-Inv D$
More work is needed here. In particular, a version for CPUs
with write-through caches should be provided, to eliminate
the write-back steps (which are noops on such CPUs, but skipping
two branches would be nice).
To generate a diff of this commit:
cvs rdiff -r1.7 -r1.8 syssrc/sys/arch/arm/arm32/bus_dma.c
cvs rdiff -r1.3 -r1.4 syssrc/sys/arch/arm/include/bus.h
cvs rdiff -r1.1 -r1.2 syssrc/sys/arch/arm/xscale/i80312_pci_dma.c
cvs rdiff -r1.4 -r1.5 syssrc/sys/arch/evbarm/integrator/int_bus_dma.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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