Source-Changes archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
CVS commit: basesrc/regress/sys/arch/arm/abort-fixup
Module Name: basesrc
Committed By: bjh21
Date: Sun Mar 17 12:32:29 UTC 2002
Modified Files:
basesrc/regress/sys/arch/arm/abort-fixup: abortfixup.c
Log Message:
Change the address used for abort fixup tests to be zero rather than
0xffffffff. This means that it won't generate a SIGBUS (address exception)
on arm26.
To generate a diff of this commit:
cvs rdiff -r1.3 -r1.4 basesrc/regress/sys/arch/arm/abort-fixup/abortfixup.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Home |
Main Index |
Thread Index |
Old Index