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Re: CVS commit: src/sys/dev



> 2) Don't wait for DRQ to deassert when we finish an IDENTIFY (or any other
>    non-block command that reads data) -- we don't do this for block I/O, and
>    empirically it doesn't clear on my CF cards at all, causing a pointless 1s
>    delay.

Intriguing, I've just looked at the code I write that accessed CF cards ok.
I looped on the data transfer until ERR was set or DRQ clear.
I'd report an error if there was any of the users buffer left, or the
device tried to transfer more data than would go into the buffer.
But the transfer itself was controlled by the device, not the lengths.
I don't remember this code relying on a timeout to complete every transfer.

        David

-- 
David Laight: david%l8s.co.uk@localhost



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