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Re: CVS commit: src/sys/arch/arm/xscale
> Log Message:
> Ok, I give up for now. There's no easy/reliable way to deal with
> these spurious interrupts.
Are they caused by the PCI write that should clear the IRQ being
buffered (eg a posted write on a PCI bridge), and not being executed
on the IO card until after the CPU has returned from the interrupt?
If so, then they are fixable by doing a read-back of the PCI write.
David
--
David Laight: david%l8s.co.uk@localhost
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