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CVS commit: src/sys/arch/arm/xscale
Module Name: src
Committed By: scw
Date: Thu Jan 6 09:34:02 UTC 2005
Modified Files:
src/sys/arch/arm/xscale: iopi2c.c
Log Message:
In iopiic_wait(), latched status bits in the ISR is cleared by writing
ones to the appropriate bits, not zeroes. In this case, just write the
value from a previous read of the register.
To generate a diff of this commit:
cvs rdiff -r1.1 -r1.2 src/sys/arch/arm/xscale/iopi2c.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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