CVS commit: src/sys/arch/i386/i386

["Erik E. Fair" <fair%netbsd.org@localhost>]

Module Name:    src
Committed By:   fair
Date:           Wed Jul  6 20:29:16 UTC 2005

Modified Files:
        src/sys/arch/i386/i386: identcpu.c

Log Message:
disable the use of TSC on Cyrix CPUs and document why:

When powersave mode is enabled, the TSC stops counting while the CPU is halted
in idle() waiting for an interrupt. This means we can't use the TSC for
interval time in microtime(9), and thus it is disabled here.

It still makes a perfectly good cycle counter for program profiling, so long
as you remember you're counting cycles, and not time. Further, if you don't
mind not using powersave mode, the TSC works just fine, so this should really
be optional. XXX


To generate a diff of this commit:
cvs rdiff -r1.20 -r1.21 src/sys/arch/i386/i386/identcpu.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.