CVS commit: src/sys/arch/mips/mips

[Izumi Tsutsui <tsutsui%netbsd.org@localhost>]

Module Name:    src
Committed By:   tsutsui
Date:           Tue Nov  8 15:31:10 UTC 2005

Modified Files:
        src/sys/arch/mips/mips: cache.c

Log Message:
Partially revert change in sys/arch/mips/mips/cache.c rev 1.27,
i.e. override mips_cache_alias_mask and mips_cache_prefer_mask
with values which match MIPS3_MAX_PCACHE_SIZE (32KB), rather than
leave them actual primary virtual indexed cache size (8KB or 16KB).
Also add comments about what the value means there.

I thought the VCE on R4000/R4400 occurred only if actual virtual alias
was detected because there was an article which mentioned that VCE
detection logic was different according to primary cache size and
it looked reasonable. But all other articles I can find later
(http://www.linux-mips.org/archives/linux-mips/1998-05/msg00084.html etc.)
claimes that VCE detection logic always verifies all 3 bits
between vaddr[14:12] and PIdx[2:0] regardless of primary cache size
(i.e. VCE could occur even if there is no actual virtual alias), and
in fact VCED still happens with the mask values adjusted for 16KB L1
but it doesn't with ones for MIPS3_MAX_PCACHE_SIZE on my R4400 news5000.


To generate a diff of this commit:
cvs rdiff -r1.29 -r1.30 src/sys/arch/mips/mips/cache.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.