CVS commit: [netbsd-3] src/sys/arch/mips

[Matthias Scheler <tron%netbsd.org@localhost>]

Module Name:    src
Committed By:   tron
Date:           Mon Nov 21 20:02:26 UTC 2005

Modified Files:
        src/sys/arch/mips/include [netbsd-3]: cache.h pmap.h
        src/sys/arch/mips/mips [netbsd-3]: cache.c mem.c pmap.c vm_machdep.c

Log Message:
Pull up following revision(s) (requested by tsutsui in ticket #961):
        sys/arch/mips/mips/cache.c: revision 1.27
        sys/arch/mips/include/cache.h: revision 1.8
        sys/arch/mips/mips/pmap.c: revision 1.158
        sys/arch/mips/mips/vm_machdep.c: revision 1.106
        sys/arch/mips/mips/mem.c: revision 1.30
        sys/arch/mips/include/pmap.h: revision 1.47
Add a workaround to handle virtual alias which may cause data corruption
on R5000/Rm52xx machines:
- Add a new global variable mips_cache_virtual_alias in mips/cache.c,
  which indicates that VIPT cache on the CPU could cause virtual alias
  and software support is required to handle it. (i.e. no VCED/VCEI)
- Add several cache flush/invalidate ops around KSEG0 access which
  might cause virtual alias if mips_cache_virtual_alias is true.
  (note checking mips_sdcache_line_size isn't valid for R5000/Rm52xx
   because only R4000/R4400 with L2 cache have VCED/VCEI)
- Remove a global variable mips_sdcache_forceinv, which is now superseded
  by new mips_cache_virtual_alias.
While here, also change some R4000/R4400 cache ops:
- Don't override mips_cache_alias_mask and mips_cache_prefer_mask with
  values based on MIPS3_MAX_PCACHE_SIZE for R4000/R4400 with L2 cache
  because it's still worth to reduce VCED/VCEI.
- Flush dcache in pmap_zero_page(9) unconditionally on all MIPS_HAS_R4K_MMU
  CPUs and remove cache flush code from cpu_lwp_fork() in vm_machdep.c.
Thanks to Markus W Kilbinger for testing patches on port-cobalt/port-mips.
XXX This fix is just a workaround because it doesn't handle all possible
XXX virtual aliases. As discussed on port-mips, maybe the real fix
XXX for virtual alias is to change MI UVM to adapt it to VIPT cache.
XXX (all VA mappings against the same PA must have the same VAC index etc.)


To generate a diff of this commit:
cvs rdiff -r1.7 -r1.7.2.1 src/sys/arch/mips/include/cache.h
cvs rdiff -r1.46 -r1.46.6.1 src/sys/arch/mips/include/pmap.h
cvs rdiff -r1.26 -r1.26.2.1 src/sys/arch/mips/mips/cache.c
cvs rdiff -r1.29 -r1.29.14.1 src/sys/arch/mips/mips/mem.c
cvs rdiff -r1.157 -r1.157.2.1 src/sys/arch/mips/mips/pmap.c
cvs rdiff -r1.105 -r1.105.8.1 src/sys/arch/mips/mips/vm_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.