CVS commit: src/sys/arch/mips/alchemy/include

[Garrett D'Amore <gdamore%netbsd.org@localhost>]

Module Name:    src
Committed By:   gdamore
Date:           Mon Oct  2 06:44:00 UTC 2006

Modified Files:
        src/sys/arch/mips/alchemy/include: aureg.h

Log Message:
Add register values required to configure PSC/SPI devices on Alchemy AU1550.
Fairly soon I will be committing a new SPI bus framwork and an Alchemy
Au1550 implementation of the framework.


To generate a diff of this commit:
cvs rdiff -r1.17 -r1.18 src/sys/arch/mips/alchemy/include/aureg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.