CVS commit: src/sys/dev/pci

[Thor Lancelot Simon <tls%netbsd.org@localhost>]

Module Name:    src
Committed By:   tls
Date:           Fri Dec 14 00:23:49 UTC 2007

Modified Files:
        src/sys/dev/pci: if_wm.c

Log Message:
Adjust interrupt moderation for newer chips to be saner according to the
82571 manual and Intel Application Note 450.  Previously, we were setting
RADV and TIDV/TADV values that didn't make any sense given the enormous
ITR value we were setting (well outside the range recommended by Intel
and quite possibly rejected silently by the chip as junk) and setting
RADV without setting RDTR, which is explicitly documented as having no
effect.

A considerable performance improvement is achieved for TCP and UDP at
gigabit speed.  I need to revisit this to deal with the timer ticks
being 4X as long when the chip's in 100mbit mode, and to set values
for the older chips' interrupt timers that are more like what the
appnote recommends.  This should help for 82543 and newer, though.


To generate a diff of this commit:
cvs rdiff -r1.149 -r1.150 src/sys/dev/pci/if_wm.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.