Module Name: src
Committed By: ad
Date: Sat May 10 16:12:33 UTC 2008
Modified Files:
src/sys/arch/amd64/amd64: amd64func.S autoconf.c cpufunc.S genassym.cf
identcpu.c ipifuncs.c procfs_machdep.c
src/sys/arch/amd64/include: cpu.h
src/sys/arch/i386/i386: autoconf.c cpufunc.S genassym.cf i386func.S
identcpu.c ipifuncs.c pmc.c powernow_k7.c procfs_machdep.c
src/sys/arch/i386/include: cpu.h
src/sys/arch/x86/include: cpu_counter.h
src/sys/arch/x86/isa: clock.c
src/sys/arch/x86/x86: cpu.c tsc.c tsc.h
Log Message:
Improve x86 tsc handling:
- Ditch the cross-CPU calibration stuff. It didn't work properly, and it's
near impossible to synchronize the CPUs in a running system, because bus
traffic will interfere with any calibration attempt, messing up the
timings.
- Only enable the TSC on CPUs where we are sure it does not drift. If we are
On a known good CPU, give the TSC high timecounter quality, making it the
default.
- When booting CPUs, detect TSC skew and account for it. Most Intel MP
systems have synchronized counters, but that need not be true if the
system has a complicated bus structure. As far as I know, AMD systems
do not have synchronized TSCs and so we need to handle skew.