Re: CVS commit: src

[enami tsugutomo <enami%sm.sony.co.jp@localhost>]

Andrew Doran <ad%NetBSD.org@localhost> writes:

> Module Name:  src
> Committed By: ad
> Date:         Fri Dec 19 11:21:25 UTC 2008
> 
> Modified Files:
>       src/common/lib/libc/arch/i386/atomic: atomic.S
>       src/sys/arch/x86/include: cpufunc.h
>       src/sys/arch/x86/x86: cpu.c identcpu.c patch.c
> 
> Log Message:
> PR kern/40213 my i386 machine can't boot because of tsc
> 
> - Patch in atomic_cas_64() twice. The first patch is early and makes it
>   the MP-atomic version available if we have cmpxchg8b. The second patch
>   strips the lock prefix if ncpu==1.
> 
> - Fix the i486 atomic_cas_64() to not unconditionally enable interrupts.
> 
> 
> To generate a diff of this commit:
> cvs rdiff -r1.13 -r1.14 src/common/lib/libc/arch/i386/atomic/atomic.S
> cvs rdiff -r1.8 -r1.9 src/sys/arch/x86/include/cpufunc.h
> cvs rdiff -r1.59 -r1.60 src/sys/arch/x86/x86/cpu.c
> cvs rdiff -r1.11 -r1.12 src/sys/arch/x86/x86/identcpu.c
> cvs rdiff -r1.14 -r1.15 src/sys/arch/x86/x86/patch.c

I recently noticed that there is a guard in x86_patch() itself to
prevent multiple call.  So, I guess above change just disabled most of
optimization on i386.  (on the other hand, on amd64 x86_patch is
called only once from cpu_boot_secondary_processosrs() since
cpu_feature is set in very earlier stage).

enami.