Source-Changes archive

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]

CVS commit: [netbsd-5] src/sys/arch/x86/x86



Module Name:    src
Committed By:   snj
Date:           Fri Dec 18 05:51:31 UTC 2009

Modified Files:
        src/sys/arch/x86/x86 [netbsd-5]: coretemp.c

Log Message:
Pull up following revision(s) (requested by sborrill in ticket #1180):
        sys/arch/x86/x86/coretemp.c: revision 1.13
CPU model and CPU extended model cannot simply be summed; the extended model
differentiates different CPUs within a given model type (i.e. model 0xe with
extended model 0x1 is NOT the same as a model 0xf).
Modern Xeons do not support MSR_IA32_EXT_CONFIG, so use model and extended
model correctly to avoid it


To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.11.4.1 src/sys/arch/x86/x86/coretemp.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



Home | Main Index | Thread Index | Old Index