CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi

[Cliff Neighbors <cliff%netbsd.org@localhost>]

Module Name:    src
Committed By:   cliff
Date:           Wed Mar 24 19:14:09 UTC 2010

Modified Files:
        src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixlreg.h

Log Message:
shift enable bits into correct field in RMIXL_PIC_CONTROL_TIMER_ENBn() macro


To generate a diff of this commit:
cvs rdiff -u -r1.1.2.9 -r1.1.2.10 src/sys/arch/mips/rmi/rmixlreg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.