CVS commit: [netbsd-5] src/sys/arch/sparc

["Jeff Rizzo" <riz%netbsd.org@localhost>]

Module Name:    src
Committed By:   riz
Date:           Tue Mar  8 17:29:46 UTC 2011

Modified Files:
        src/sys/arch/sparc/dev [netbsd-5]: zs.c
        src/sys/arch/sparc/include [netbsd-5]: cpu.h z8530var.h
        src/sys/arch/sparc/sparc [netbsd-5]: cpu.c cpuvar.h db_interface.c
            genassym.cf intr.c locore.s machdep.c timer.c timer_sun4m.c
            timervar.h trap.c vm_machdep.c

Log Message:
Apply patches (requested by mrg in ticket #1564):
        sys/arch/sparc/dev/zs.c:                patch
        sys/arch/sparc/include/cpu.h:           patch
        sys/arch/sparc/include/z8530var.h:      patch
        sys/arch/sparc/sparc/cpu.c:             patch
        sys/arch/sparc/sparc/cpuvar.h:          patch
        sys/arch/sparc/sparc/db_interface.c:    patch
        sys/arch/sparc/sparc/genassym.cf:       patch
        sys/arch/sparc/sparc/intr.c:            patch
        sys/arch/sparc/sparc/locore.s:          patch
        sys/arch/sparc/sparc/machdep.c:         patch
        sys/arch/sparc/sparc/timer.c:           patch
        sys/arch/sparc/sparc/timer_sun4m.c:     patch
        sys/arch/sparc/sparc/timervar.h:        patch
        sys/arch/sparc/sparc/trap.c:            patch
        sys/arch/sparc/sparc/vm_machdep.c:      patch

- fix a panic in savefpstate.  idea, and code suggestions from uwe
- convert xpmsg_lock to IPL_SCHED.  the old spl/simple_lock code ran at
  splsched(), and this significantly helps with stability under load when
  running with multiple active CPUs
- in strayintr() don't print about stray zs inters in MP case
- fix a deadlock in xcall()
- consolidate the interrupt evcnt(9) into a full set of per-IPL per-CPU
  soft/hard counters
- fix xcall() failure messages in some cases
- addd new ddb command "mach xcall"
- use schedintr() (not schedintr_4m()) on MP or single CPU configurations
- call hardclock() the same way on cpu0 in MP and !MP cases
- request the appropriate stack space for nmi_sun4m, in particular,
  make sure we have space for %g2...%g5.  now entering ddb via eg,
  serial break no longer causes cpu1 to fault.
- give memfault_sun*() some entry points that both gdb and ddb will find.
from tsutsui:
- fix panic in interrupt handlers in zs


To generate a diff of this commit:
cvs rdiff -u -r1.111.6.3 -r1.111.6.4 src/sys/arch/sparc/dev/zs.c
cvs rdiff -u -r1.84.14.1 -r1.84.14.2 src/sys/arch/sparc/include/cpu.h
cvs rdiff -u -r1.9 -r1.9.14.1 src/sys/arch/sparc/include/z8530var.h
cvs rdiff -u -r1.211.8.4 -r1.211.8.5 src/sys/arch/sparc/sparc/cpu.c
cvs rdiff -u -r1.75.10.4 -r1.75.10.5 src/sys/arch/sparc/sparc/cpuvar.h
cvs rdiff -u -r1.79.4.2 -r1.79.4.3 src/sys/arch/sparc/sparc/db_interface.c
cvs rdiff -u -r1.56.4.1 -r1.56.4.2 src/sys/arch/sparc/sparc/genassym.cf
cvs rdiff -u -r1.100.20.2 -r1.100.20.3 src/sys/arch/sparc/sparc/intr.c
cvs rdiff -u -r1.244.8.3 -r1.244.8.4 src/sys/arch/sparc/sparc/locore.s
cvs rdiff -u -r1.282.4.3 -r1.282.4.4 src/sys/arch/sparc/sparc/machdep.c
cvs rdiff -u -r1.23 -r1.23.28.1 src/sys/arch/sparc/sparc/timer.c
cvs rdiff -u -r1.16.56.2 -r1.16.56.3 src/sys/arch/sparc/sparc/timer_sun4m.c
cvs rdiff -u -r1.8 -r1.8.74.1 src/sys/arch/sparc/sparc/timervar.h
cvs rdiff -u -r1.176 -r1.176.4.1 src/sys/arch/sparc/sparc/trap.c
cvs rdiff -u -r1.95.4.2 -r1.95.4.3 src/sys/arch/sparc/sparc/vm_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.