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CVS commit: [netbsd-6] src/external/gpl3/gcc/dist/gcc/config/i386
Module Name: src
Committed By: riz
Date: Wed Oct 17 21:30:33 UTC 2012
Modified Files:
src/external/gpl3/gcc/dist/gcc/config/i386 [netbsd-6]: i386.c i386.h
netbsd-elf.h netbsd64.h
Log Message:
Pull up following revision(s) (requested by joerg in ticket #560):
external/gpl3/gcc/dist/gcc/config/i386/netbsd-elf.h: revision 1.3
external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h: revision 1.2
external/gpl3/gcc/dist/gcc/config/i386/i386.c: revision 1.2
external/gpl3/gcc/dist/gcc/config/i386/i386.h: revision 1.2
Fix GCC to correctly implement the i386 psABI on NetBSD.
This consists of two parts:
- for NetBSD/i386 and NetBSD/AMD64 with -m32, use a default stack
alignment of 23bit as specified by the ABI
- ensure that double and long long variables on the stack are by default
only aligned to 32bit, if there is nothing else in the function
needing a larger stack alignment
The combination ensures that SSE variables on the stack trigger the
realignment logic, but just using double or long long doesn't.
PR 46978: ICE on spilling MMX registers
GCC/i386 has code to lower the required alignment for long long to 32bit
as the CPU doesn't need more. It is also using the same mode for setting
up the MMX registers and in turn, the stack slots reserved for spilling
require 32bit alignment. The actual vector types used keep the original
64bit alignment, so when the compiler wants to spill a MMX register, it
hits an assertion. Fix this by using the vector type as raw type for MMX
registers.
To generate a diff of this commit:
cvs rdiff -u -r1.1.1.1 -r1.1.1.1.4.1 \
src/external/gpl3/gcc/dist/gcc/config/i386/i386.c \
src/external/gpl3/gcc/dist/gcc/config/i386/i386.h \
src/external/gpl3/gcc/dist/gcc/config/i386/netbsd64.h
cvs rdiff -u -r1.2 -r1.2.2.1 \
src/external/gpl3/gcc/dist/gcc/config/i386/netbsd-elf.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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