CVS commit: src/sys/arch/x86/include

["SAITOH Masanobu" <msaitoh%netbsd.org@localhost>]

Module Name:    src
Committed By:   msaitoh
Date:           Wed Jul 17 15:22:43 UTC 2013

Modified Files:
        src/sys/arch/x86/include: cacheinfo.h

Log Message:
 Fix 0x0d's DCACHE entry and 0xeb's L3CACHE entry from the document
(Table 3-22 Encoding of CPUID Leaf 2 Descriptors, Intel 64 and IA-32
Architectures Software Developer's Manual Vol. 2A.)


To generate a diff of this commit:
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/x86/include/cacheinfo.h

Please note that diffs are not public domain; they are subject to the
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