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CVS commit: src/sys/arch/mips/ingenic
Module Name: src
Committed By: macallan
Date: Tue Apr 21 19:56:02 UTC 2015
Modified Files:
src/sys/arch/mips/ingenic: ingenic_regs.h
Log Message:
#define some bits in the clock gating registers
To generate a diff of this commit:
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/mips/ingenic/ingenic_regs.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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