CVS commit: src/sys/arch

["Hikaru Abe" <hikaru%netbsd.org@localhost>]

Module Name:    src
Committed By:   hikaru
Date:           Wed Apr 29 08:32:01 UTC 2015

Modified Files:
        src/sys/arch/mips/conf: files.mips
        src/sys/arch/mips/include: cpuregs.h locore.h
        src/sys/arch/mips/mips: cache.c mips_machdep.c
Added Files:
        src/sys/arch/evbmips/cavium: autoconf.c mach_intr.c machdep.c
            octeon_bootbus_machdep.c octeon_uboot.h
        src/sys/arch/evbmips/conf: ERLITE files.octeon
        src/sys/arch/mips/cavium: autoconf.h mainbus.c mainbus_octeon1p.c
            octeon1p_iobus.c octeon_bootbus.c octeon_dma.c octeon_intr.c
            octeon_iobus.c octeonvar.h
        src/sys/arch/mips/cavium/dev: if_cnmac.c if_cnmacvar.h octeon_asx.c
            octeon_asxreg.h octeon_asxvar.h octeon_bootbusreg.h octeon_ciu.c
            octeon_ciureg.h octeon_cop2reg.h octeon_cop2var.h octeon_corereg.h
            octeon_fau.c octeon_faureg.h octeon_fauvar.h octeon_fpa.c
            octeon_fpareg.h octeon_fpavar.h octeon_gmx.c octeon_gmxreg.h
            octeon_gmxvar.h octeon_gpioreg.h octeon_iobreg.h octeon_ipd.c
            octeon_ipdreg.h octeon_ipdvar.h octeon_l2creg.h octeon_mpi.c
            octeon_mpireg.h octeon_mpivar.h octeon_npireg.h octeon_pci.c
            octeon_pcmreg.h octeon_pip.c octeon_pipreg.h octeon_pipvar.h
            octeon_pko.c octeon_pkoreg.h octeon_pkovar.h octeon_pow.c
            octeon_powreg.h octeon_powvar.h octeon_rnm.c octeon_rnmreg.h
            octeon_smi.c octeon_smireg.h octeon_smivar.h octeon_tim.c
            octeon_timreg.h octeon_twsi.c octeon_twsireg.h octeon_uart.c
            octeon_uartreg.h octeon_usbc.c octeon_usbcreg.h octeon_usbcvar.h
            octeon_usbn.c octeon_usbnreg.h octeon_usbnvar.h
        src/sys/arch/mips/cavium/include: bootbusvar.h iobusvar.h mainbusvar.h
        src/sys/arch/mips/conf: files.octeon std.octeon
        src/sys/arch/mips/include: cache_octeon.h
        src/sys/arch/mips/mips: cache_octeon.c locore_octeon.S

Log Message:
Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart of are worked.
This support was contributed by Internet Initiative Japan Inc.


To generate a diff of this commit:
cvs rdiff -u -r0 -r1.1 src/sys/arch/evbmips/cavium/autoconf.c \
    src/sys/arch/evbmips/cavium/mach_intr.c \
    src/sys/arch/evbmips/cavium/machdep.c \
    src/sys/arch/evbmips/cavium/octeon_bootbus_machdep.c \
    src/sys/arch/evbmips/cavium/octeon_uboot.h
cvs rdiff -u -r0 -r1.1 src/sys/arch/evbmips/conf/ERLITE \
    src/sys/arch/evbmips/conf/files.octeon
cvs rdiff -u -r0 -r1.1 src/sys/arch/mips/cavium/autoconf.h \
    src/sys/arch/mips/cavium/mainbus.c \
    src/sys/arch/mips/cavium/mainbus_octeon1p.c \
    src/sys/arch/mips/cavium/octeon1p_iobus.c \
    src/sys/arch/mips/cavium/octeon_bootbus.c \
    src/sys/arch/mips/cavium/octeon_dma.c \
    src/sys/arch/mips/cavium/octeon_intr.c \
    src/sys/arch/mips/cavium/octeon_iobus.c \
    src/sys/arch/mips/cavium/octeonvar.h
cvs rdiff -u -r0 -r1.1 src/sys/arch/mips/cavium/dev/if_cnmac.c \
    src/sys/arch/mips/cavium/dev/if_cnmacvar.h \
    src/sys/arch/mips/cavium/dev/octeon_asx.c \
    src/sys/arch/mips/cavium/dev/octeon_asxreg.h \
    src/sys/arch/mips/cavium/dev/octeon_asxvar.h \
    src/sys/arch/mips/cavium/dev/octeon_bootbusreg.h \
    src/sys/arch/mips/cavium/dev/octeon_ciu.c \
    src/sys/arch/mips/cavium/dev/octeon_ciureg.h \
    src/sys/arch/mips/cavium/dev/octeon_cop2reg.h \
    src/sys/arch/mips/cavium/dev/octeon_cop2var.h \
    src/sys/arch/mips/cavium/dev/octeon_corereg.h \
    src/sys/arch/mips/cavium/dev/octeon_fau.c \
    src/sys/arch/mips/cavium/dev/octeon_faureg.h \
    src/sys/arch/mips/cavium/dev/octeon_fauvar.h \
    src/sys/arch/mips/cavium/dev/octeon_fpa.c \
    src/sys/arch/mips/cavium/dev/octeon_fpareg.h \
    src/sys/arch/mips/cavium/dev/octeon_fpavar.h \
    src/sys/arch/mips/cavium/dev/octeon_gmx.c \
    src/sys/arch/mips/cavium/dev/octeon_gmxreg.h \
    src/sys/arch/mips/cavium/dev/octeon_gmxvar.h \
    src/sys/arch/mips/cavium/dev/octeon_gpioreg.h \
    src/sys/arch/mips/cavium/dev/octeon_iobreg.h \
    src/sys/arch/mips/cavium/dev/octeon_ipd.c \
    src/sys/arch/mips/cavium/dev/octeon_ipdreg.h \
    src/sys/arch/mips/cavium/dev/octeon_ipdvar.h \
    src/sys/arch/mips/cavium/dev/octeon_l2creg.h \
    src/sys/arch/mips/cavium/dev/octeon_mpi.c \
    src/sys/arch/mips/cavium/dev/octeon_mpireg.h \
    src/sys/arch/mips/cavium/dev/octeon_mpivar.h \
    src/sys/arch/mips/cavium/dev/octeon_npireg.h \
    src/sys/arch/mips/cavium/dev/octeon_pci.c \
    src/sys/arch/mips/cavium/dev/octeon_pcmreg.h \
    src/sys/arch/mips/cavium/dev/octeon_pip.c \
    src/sys/arch/mips/cavium/dev/octeon_pipreg.h \
    src/sys/arch/mips/cavium/dev/octeon_pipvar.h \
    src/sys/arch/mips/cavium/dev/octeon_pko.c \
    src/sys/arch/mips/cavium/dev/octeon_pkoreg.h \
    src/sys/arch/mips/cavium/dev/octeon_pkovar.h \
    src/sys/arch/mips/cavium/dev/octeon_pow.c \
    src/sys/arch/mips/cavium/dev/octeon_powreg.h \
    src/sys/arch/mips/cavium/dev/octeon_powvar.h \
    src/sys/arch/mips/cavium/dev/octeon_rnm.c \
    src/sys/arch/mips/cavium/dev/octeon_rnmreg.h \
    src/sys/arch/mips/cavium/dev/octeon_smi.c \
    src/sys/arch/mips/cavium/dev/octeon_smireg.h \
    src/sys/arch/mips/cavium/dev/octeon_smivar.h \
    src/sys/arch/mips/cavium/dev/octeon_tim.c \
    src/sys/arch/mips/cavium/dev/octeon_timreg.h \
    src/sys/arch/mips/cavium/dev/octeon_twsi.c \
    src/sys/arch/mips/cavium/dev/octeon_twsireg.h \
    src/sys/arch/mips/cavium/dev/octeon_uart.c \
    src/sys/arch/mips/cavium/dev/octeon_uartreg.h \
    src/sys/arch/mips/cavium/dev/octeon_usbc.c \
    src/sys/arch/mips/cavium/dev/octeon_usbcreg.h \
    src/sys/arch/mips/cavium/dev/octeon_usbcvar.h \
    src/sys/arch/mips/cavium/dev/octeon_usbn.c \
    src/sys/arch/mips/cavium/dev/octeon_usbnreg.h \
    src/sys/arch/mips/cavium/dev/octeon_usbnvar.h
cvs rdiff -u -r0 -r1.1 src/sys/arch/mips/cavium/include/bootbusvar.h \
    src/sys/arch/mips/cavium/include/iobusvar.h \
    src/sys/arch/mips/cavium/include/mainbusvar.h
cvs rdiff -u -r1.72 -r1.73 src/sys/arch/mips/conf/files.mips
cvs rdiff -u -r0 -r1.1 src/sys/arch/mips/conf/files.octeon \
    src/sys/arch/mips/conf/std.octeon
cvs rdiff -u -r0 -r1.1 src/sys/arch/mips/include/cache_octeon.h
cvs rdiff -u -r1.89 -r1.90 src/sys/arch/mips/include/cpuregs.h
cvs rdiff -u -r1.94 -r1.95 src/sys/arch/mips/include/locore.h
cvs rdiff -u -r1.48 -r1.49 src/sys/arch/mips/mips/cache.c
cvs rdiff -u -r0 -r1.1 src/sys/arch/mips/mips/cache_octeon.c \
    src/sys/arch/mips/mips/locore_octeon.S
cvs rdiff -u -r1.262 -r1.263 src/sys/arch/mips/mips/mips_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.